M68AW511A
4 Mbit (512K x8) 3.0V Asynchronous SRAM
FEATURES SUMMARY s SUPPLY VOLTAGE: 2.7 to 3.6V
s s s s s s
Figure 1. Packages
512K x 8 bits SRAM with OUTPUT ENABLE EQUAL CYCLE and ACCESS TIMES: 55ns LOW STANDBY CURRENT LOW VCC DATA RETENTION: 1.5V TRI-STATE COMMON I, O LOW ACTIVE and STANDBY POWER
32
1
TSOP32 Type II (NC)
SO32 (MC)
June 2003
1, 18
M68AW511A
TABLE OF CONTENTS SUMMARY DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .