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M48Z12 Datasheet PDF
- 16 Kbit (2 Kb x 8) ZEROPOWER SRAM - RAM
M48Z02 M48Z12 5 V, 16 Kbit (2 Kb x 8) ZEROPOWER® SRAM Features - Integrated, ultra low power SRAM and powerfail control circuit - Unlimited WRITE cycles - READ cycle time equals WRITE cycle time - Automatic power-fail chip deselect and WRITE protection - WRITE protect voltages (VPFD = power-fail deselect voltage): M48Z02: VCC= 4.75 to 5.5 V; 4.5 V ≤ VPFD ≤ 4.75 V M48Z12: VCC= 4.5 to 5.5 V; 4.2 V ≤ VPFD ≤ 4.5 V - Self-contained battery in the CAPHAT™ DIP package - Pin and function c
ST Microelectronics - 1 Mbit (128 Kbit x 8) ZEROPOWER SRAM - RAM
M48Z128 M48Z128Y 5.0 V, 1 Mbit (128 Kbit x 8) ZEROPOWER® SRAM Not recommended for new design Features - Integrated, ultra low power SRAM, power-fail control circuit, and battery - Conventional SRAM operation; unlimited )WRITE cycles t(s- 10 years of data retention in the absence of cpower du- Battery internally isolated until power is first roapplied P- Automatic power-fail chip deselect and WRITE protection lete- WRITE protect voltages: o(VPFD = power-fail deselect voltage) s M48Z128: VCC
ST Microelectronics
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