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ICS680-01 Datasheet PDF
- Networking Clock Synthesizer and Zero Delay Buffer - Buffer
ICS680-01 Networking Clock Synthesizer and Zero Delay Buffer Description The ICS680-01 generates four high-frequency clock outputs and a reference from a 25 MH- crystal or clock input. The device includes a low-skew, single input to four output zero delay clock buffer. It can replace multiple crystals and oscillators, saving board space and cost. The device has a power-down tri-state (PDTS) pin that place the clock outputs in a high-impedance state when pulled low. The PDTS pin includes an int
Integrated Circuit Systems
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