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CD4527BMS Datasheet PDF
- CMOS BCD Rate Multiplier - CMOS
CD4527BMS December 1992 CMOS BCD Rate Multiplier Description CD4527BMS is a low power 4-bit digital rate multiplier that provides an output pulse rate which is the clock input pulse rate multiplied by 1, 10 times the BCD input. For example, when the BCD input is 8, there will be 8 output pulses for every 10 input pulses. This device may be used to perform arithmetic operations (add, subtract, divide, raise to a power), solve algebraic and differential equations, generate natural logarithms and
Intersil Corporation
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