CD4511BM CD4511BC BCD-to-7 Segment Latch Decoder Driver
February 1988
CD4511BM CD4511BC BCD-to-7 Segment Latch Decoder Driver
General Description
The CD4511BM CD4511BC BCD-to-seven segment latch decoder driver is constructed with complementary MOS (CMOS) enhancement mode devices and NPN bipolar output drivers in a single monolithic structure The circuit provides the functions of a 4-bit storage latch an 8421 BCD-toseven segment decoder and an output drive capability Lamp test (LT) blanking (BI
National Semiconductor
CMOS Presettable Up/Down Counters - CMOS
CD4510BMS, CD4516BMS
Data Sheet December 1992 File Number 3338
CMOS Presettable Up, Down Counters
CD4510BMS Presettable BCD Up, Down Counter and the CD4516BMS Presettable Binary Up, Down counter consist of four synchronously clocked D-type flip-flops (with a gating structure to provide T-type flip-flop capability) connected as counters. These counters can be cleared by a high level on the RESET line, and can be preset to any binary number present on the jam inputs by a high level on the PRESET