Addendum to Datasheet
This document is an addendum for the Smart Card Interface block concerning the “Initialization Procedure” section of the AT8xC5122, 3 datasheet, available on the Atmel web site. Table 1. DCCKPS.7 (S:BFh) : MODE bit management
CVCC DC, DC Output voltage LI pin With Inductor MODE bit Start After VCARDOK = 1 No inductor Notes: Start 5V 0 0 1 3V 1, 0 1 1 1
(1)
Smart Card Reader ICs AT83C5122 AT83EC5122 AT85C5122 AT85EC5122 AT89C5122 AT83C5123 AT83EC5123
1.8V 1 , 0(1) 1 1
ATMEL Corporation
(AT8xx512x) Smart Card Reader ICs - Data
Features
80C51 Core :
6 Clocks per Instruction Speed up to 16 MH- 768 Bytes RAM AT83C5122: 32 Kbytes ROM AT83C5123: 30 Kbytes ROM AT85C5122: 32 Kbytes Code RAM and 32 Kbytes ROM AT89C5122 : 32 Kbytes Flash AT85EC5122, AT83EC5123, AT83EC5122: Additional 512 Bytes EEPROM (AT24C04) Multi-protocol Smart Card Interface Certified According to ISO7816, EMV2000, GIE-CB and WHQM Standards Asynchronous Protocols T = 0 and T = 1, with Direct and Inverse Modes Step-up, Down Converter with Prog