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ADAU1977 Datasheet PDF
- Quad ADC - Data
Data Sheet FEATURES Programmable microphone bias (5 V to 9 V) with diagnostics Four 10 V rms capable direct-coupled differential inputs On-chip PLL for master clock Low EMI design 106 dB ADC dynamic range 95 dB THD + N Selectable digital high-pass filter 24-bit ADC with 8 kH- to 192 kH- sample rates Digital volume control with autoramp function I2C, SPI control Software-controllable clickless mute Software power-down Right justified, left justified, I2S justified, and TDM modes Master and slave
Analog Devices
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