Data Sheet
Integrated Mixed-Signal Front End (MxFE) AD9993
FEATURES
Quad 14-bit 250 MSPS ADC SFDR = 83 dBc at 87 MH- input
Dual 14-bit 500 MSPS DAC SFDR = 75 dBc at 20 MH- output
On-chip PLL clock synthesizer Low power
1536 mW, 1 GH- master clock, on-chip synthesizer 500 MH- double data rate (DDR) LVDS interfaces for DACs and ADCs Small 12 mm × 12 mm lead-free BGA package
APPLICATIONS
Point to point microwave backhaul radios Wireless repeaters
GENERAL DESCRIPTION
The AD9993 is a mixed-signal