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AD5684 Datasheet PDF
- (AD5684 / AD5686) 16-/12-Bit nanoDAC - Data
Data Sheet FEATURES High relative accuracy (INL): ±2 LSB maximum @ 16 bits Tiny package: 3 mm × 3 mm, 16-lead LFCSP Total unadjusted error (TUE): ±0.1% of FSR maximum Offset error: ±1.5 mV maximum Gain error: ±0.1% of FSR maximum High drive capability: 20 mA, 0.5 V from supply rails User selectable gain of 1 or 2 (GAIN pin) Reset to zero scale or midscale (RSTSEL pin) 1.8 V logic compatibility 50 MH- SPI with readback or daisy chain Low glitch: 0.5 nV-sec Robust 4 kV HBM and 1.5 kV FICDM ES
Analog Devices - Quad 16-/14-/12-Bit nanoDAC - Data
Data Sheet FEATURES Quad 16-, 14-, 12-Bit nanoDAC+ with 2 ppm, °C Reference, I2C Interface AD5696R, AD5695R, AD5694R FUNCTIONAL BLOCK DIAGRAM VDD GND VREF 2.5V REFERENCE STRING DAC A BUFFER VOUTA High relative accuracy (INL): ±2 LSB maximum @ 16 bits Low drift 2.5 V reference: 2 ppm, °C typical Tiny package: 3 mm × 3 mm, 16-lead LFCSP Total unadjusted error (TUE): ±0.1% of FSR maximum Offset error: ±1.5 mV maximum Gain error: ±0.1% of FSR maximum High drive capability: 20 mA, 0.5 V from
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