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74VHC74 Datasheet PDF

  • DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR - Data

    ® 74VHC74 DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR s s s s s s s s s HIGH SPEED: fMAX =170 MH- (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 2 A (MAX.) at TA = 25 oC HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8 mA (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 5.5V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 74 IMPROVED LATCH-UP IMMUNITY M (Micro Package)

    STMicroelectronics
    STMicroelectronics


  • Dual D-Type Flip-Flop with Preset and Clear - Flip-flop

    74VHC74 Dual D-Type Flip-Flop with Preset and Clear October 1992 Revised March 1999 74VHC74 Dual D-Type Flip-Flop with Preset and Clear General Description The VHC74 is an advanced high speed CMOS Dual DType Flip-Flop fabricated with silicon gate CMOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. The signal level applied to the D input is transferred to the Q output during the positive going transit

    Fairchild Semiconductor
    Fairchild Semiconductor




 






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