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74VHC373M Datasheet PDF

  • OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT NON INVERTING - Latch

    ® 74VHC373 OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT NON INVERTING s s s s s s s s s s HIGH SPEED: tPD = 5.0 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 4 A (MAX.) at TA = 25 oC HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8 mA (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 5.5V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 373 IMPROVED LATCH-UP IMMUNITY LOW NOIS

    STMicroelectronics
    STMicroelectronics


  • Octal D-Type Latch with 3-STATE Outputs - Latch

    74VHC373 Octal D-Type Latch with 3-STATE Outputs February 1993 Revised April 1999 74VHC373 Octal D-Type Latch with 3-STATE Outputs General Description The VHC373 is an advanced high speed CMOS octal Dtype latch with 3-STATE output fabricated with silicon gate CMOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. This 8-bit D-type latch is controlled by a latch enable input (LE) and an output enable inp

    Fairchild Semiconductor
    Fairchild Semiconductor




 






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