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74HCT138 Datasheet PDF
- 3-to-8 line decoder/demultiplexer inverting - multiplexer
INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: The IC06 74HC, HCT, HCU, HCMOS Logic Family Specifications The IC06 74HC, HCT, HCU, HCMOS Logic Package Information The IC06 74HC, HCT, HCU, HCMOS Logic Package Outlines 74HC, HCT138 3-to-8 line decoder, demultiplexer; inverting Product speci cation File under Integrated Circuits, IC06 September 1993 Philips Semiconductors Product speci cation 3-to-8 line decoder, demultiplexer; inverting FEATURES Demultiple
Philips - 3-to-8 line decoder/demultiplexer - multiplexer
74HC138; 74HCT138 3-to-8 line decoder, demultiplexer; inverting Rev. 6 28 December 2015 Product data sheet 1. General description The 74HC138; 74HCT138 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). The device features three enable inputs (E1, E2 and E3). Every output will be HIGH unless E1 and E2 are LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion to a 1-of-32 (5 to 32 lines) decoder with just fou
NXP Semiconductors
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