3-to-8 line decoder/demultiplexer; inverting - multiplexer
INTEGRATED CIRCUITS
DATA SHEET
74AHC138; 74AHCT138 3-to-8 line decoder, demultiplexer; inverting
Product speci cation Supersedes data of 1999 Mar 31 File under Integrated Circuits, IC06 1999 Sep 27
Philips Semiconductors
Product speci cation
3-to-8 line decoder, demultiplexer; inverting
FEATURES ESD protection: HBM EIA, JESD22-A114-A exceeds 2000 V MM EIA, JESD22-A115-A exceeds 200 V CDM EIA, JESD22-C101 exceeds 1000 V Balanced propagation delays All inputs have Schmitt-trigger actions
NXP Semiconductors
3 TO 8 LINE DECODER DEMULTIPLEXER - multiplexer
74AHCT138
3 TO 8 LINE DECODER DEMULTIPLEXER
Description
The 74AHCT138 is an advanced high speed CMOS device that is designed to be pin compatable with 74LS low power Schottky types.
The device accepts a three bit binary weighted address on input pins A0, A1 and A2 and when enabled will produce one active low output with the remaining seven being high.
There are two active LOW enable inputs E1 and E2, and one active HIGH enable input E3. The disabled device state results in all outputs being hig