74ACT32
QUAD 2-INPUT OR GATE
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HIGH SPEED: tPD = 4.5 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 4 A (MAX.) at TA = 25 oC COMPATIBLE WITH TTL OUTPUTS VIH = 2V (MIN), VIL = 0.8V (MAX) 50Ω TRANSMISSION LINE DRIVING CAPABILITY SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24 mA (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 4.5V to 5.5V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 32 IMPROVED LATCH-UP IMMUNITY
B M (Plastic Package)
STMicroelectronics
8-Bit Universal Shift/Storage Register with Synchronous Reset and Common I/O Pins - Register
74ACT323 8-Bit Universal Shift, Storage Register with Synchronous Reset and Common I, O Pins
June 1988 Revised October 1998
74ACT323 8-Bit Universal Shift, Storage Register with Synchronous Reset and Common I, O Pins
General Description
The ACT323 is an 8-bit universal shift, storage register with 3-STATE outputs. Parallel load inputs and flip-flop outputs are multiplexed to minimize pin count. Separate serial inputs and outputs are provided for Q0 and Q7 to allow easy cascading. Four operatio