CY7C142 PDF Datasheet

The CY7C142 is 2K x 8 Dual-Port Static RAM. It also consolidates and displays results from multiple manufacturers with the same part number and similar functionality.

Searched parts can be used interchangeably as substitutes for one another, But it's important to note that the parameters for each manufacturer may vary slightly.

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NO	Part No	Descripción	Manufacturers
1	CY7C142	2K x 8 Dual-Port Static RAM CY7C132, CY7C136 CY7C136A, CY7C142, CY7C146 2K x 8 Dual-Port Static RAM Features - True dual-ported memory cells that enable simultaneous reads of the same memory location - 2K x 8 organization - 0.65 micron CMOS for optimum speed and power - High speed access: 15 ns - Low operating power: ICC = 11	Cypress Semiconductor
2	CY7C1420AV18	(CY7C14xxAV18) 36-Mbit DDR-II SRAM 2-Word Burst Architecture PRELIMINARY CY7C1416AV18 CY7C1427AV18 CY7C1418AV18 CY7C1420AV18 36-Mbit DDR-II SRAM 2-Word Burst Architecture Features 36-Mbit density (4M x 8, 4M x 9, 2M x 18, 1M x 36) 250-MH- clock for high bandwidth 2-Word burst for reducing address bus frequency Double Data Rate (DDR) interfaces (data t	Cypress Semiconductor
3	CY7C1420BV18	(CY7C14xxBV18) 36-Mbit DDR-II SRAM 2-Word Burst Architecture CY7C1416BV18, CY7C1427BV18 CY7C1418BV18, CY7C1420BV18 36-Mbit DDR-II SRAM 2-Word Burst Architecture Features - - - - - Functional Description The CY7C1416BV18, CY7C1427BV18, CY7C1418BV18, and CY7C1420BV18 are 1.8V Synchronous Pipelined SRAM equipped with DDR-II architecture. The DDR-II consists	Cypress Semiconductor
4	CY7C1420JV18	(CY7C14xxJV18) 36-Mbit DDR-II SRAM 2-Word Burst Architecture CY7C1416JV18, CY7C1427JV18 CY7C1418JV18, CY7C1420JV18 36-Mbit DDR-II SRAM 2-Word Burst Architecture Features - - - - - Functional Description The CY7C1416JV18, CY7C1427JV18, CY7C1418JV18 and CY7C1420JV18 are 1.8V Synchronous Pipelined SRAM equipped with DDR-II architecture. The DDR-II consists o	Cypress Semiconductor

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Relevant Search Results

Part No	Description	Manufacturers	PDF
CY7C1006B	256K x 4 Static RAM 1CY7C1006B CY7C106B CY7C1006B 256K x 4 Static RAM Features High speed tAA = 12 ns CMOS for optimum speed, power Low active power 495 mW Low standby power 275 mW 2.0V data retention (optional) 100 W Automatic power-down when deselected TTL-compatible inputs and outputs Enable (CE), an a	Cypress Semiconductor
CY7C1009B	128K x 8 Static RAM 009B CY7C109B CY7C1009B 128K x 8 Static RAM Features High speed tAA = 12 ns Low active power 495 mW (max. 12 ns) Low CMOS standby power 55 mW (max.) 4 mW 2.0V Data Retention Automatic power-down when deselected TTL-compatible inputs and outputs Easy memory expansion with CE1, CE2, and OE	Cypress Semiconductor
CY7C1011BV33	128K x 16 Static RAM CY7C1011BV33 128K x 16 Static RAM Features 3.0 3.6V Operation High speed tAA = 12, 15 ns CMOS for optimum speed, power Low active power 684 mW (Max.) Automatic power-down when deselected Independent control of upper and lower bits Available in 44-pin TSOP II (BLE) is LOW, then data from I	Cypress Semiconductor
CY7C9925	3.3V/2.5V Programmable Skew Clock Buffer	Cypress Semiconductor
CY7C9915	3.3V Programmable Skew Clock Buffer	Cypress Semiconductor
CY7C9689A	TAXI-compatible HOTLink Transceiver	Cypress Semiconductor
CY7C9689	TAXI Compatible HOTLink Transceiver	Cypress Semiconductor

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