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74LS174 Datasheet PDF | Stock |
| Searched parts can be used interchangeably as substitutes for one another, But it's important to note that the parameters for each manufacturer may vary slightly. |
| Product Description and Specifications |
Displays the Product Image or Pinouts. 1. D Flip-Flop - ON Semiconductor [ Learn More ] ![]() 2. HEX D FLIP-FLOP - Motorola [ Learn More ] |
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- 74LS174
LOW POWER SCHOTTKY
SN74LS174 Hex D Flip-Flop The LSTTL , MSI SN74LS174 is a high speed Hex D Flip-Flop. The device is used primarily as a 6-bit edge-triggered storage register. The information on the D inputs is transferred to storage during the LOW to HIGH clock transition. The device has a Master Reset to simultaneously clear all flip-flops. The LS174 is fabricated with the Schottky barrier diode process for high speed and is completely compatible with all ON Semiconductor TTL families. http:, , onsemi.com - 74LS174
Hex/Quad D-Type Flip-Flops with Clear
DM74LS174 DM74LS175 Hex, Quad D-Type Flip-Flops with Clear August 1992 Revised April 2000 DM74LS174 DM74LS175 Hex, Quad D-Type Flip-Flops with Clear General Description These positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic. All have a direct clear input, and the quad (175) versions feature complementary outputs from each flip-flop. Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going - 74LS174
Hex/Quadruple D-type Flip-Flips(with clear)
19.20 20.00 Max 16 9 7.40 Max 6.30 Unit: mm 1 1.3 1.11 Max 8 0.51 Min 2.54 Min 5.06 Max 7.62 2.54 ± 0.25 0.48 ± 0.10 0.25 0.05 0° 15° Hitachi Code JEDEC EIAJ Weight (reference value) + 0.13 DP-16 Conforms Conforms 1.07 g Unit: mm 10.06 10.5 Max 16 9 5.5 1 *0.22 ± 0.05 0.20 ± 0.04 8 0.80 Max 2.20 Max 0.20 7.80 + 0.30 1.15 0° 8° 0.70 ± 0.20 1.27 *0.42 ± 0.08 0.40 ± 0.06 0.12 M Hitachi Code JEDEC EIAJ Weight (reference value) FP-16DA Conforms 0.24 g *Dimension in - 74LS174
Hex/Quad D Flip-Flops with Clear
54LS174 DM54LS174 DM74LS174 54LS175 DM54LS175 DM74LS175 Hex Quad D Flip-Flops with Clear June 1989 54LS174 DM54LS174 DM74LS174 54LS175 DM54LS175 DM74LS175 Hex Quad D Flip-Flops with Clear General Description These positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic All have a direct clear input and the quad (175) versions feature complementary outputs from each flip-flop Information at the D inputs meeting the setup time requirements is transferred to t - 74LS174
HEX D FLIP-FLOP
SN54, 74LS174 HEX D FLIP-FLOP The LSTTL , MSI SN54 , 74LS174 is a high speed Hex D Flip-Flop. The device is used primarily as a 6-bit edge-triggered storage register. The information on the D inputs is transferred to storage during the LOW to HIGH clock transition. The device has a Master Reset to simultaneously clear all flip-flops. The LS174 is fabricated with the Schottky barrier diode process for high speed and is completely compatible with all Motorola TTL families. HEX D FLIP-FLOP LOW P
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