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74LS14 Datasheet PDF | Stock

This device contains six independent gates each of which performs the logic INVERT function Each input has hysteresis which increases the noise immunity and transforms a slowly changing input signal to a fast changing jitter free output.


Searched parts can be used interchangeably as substitutes for one another, But it's important to note that the parameters for each manufacturer may vary slightly.

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74LS14 Hex Inverter


1. Hex Inverter with Schmitt Trigger

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Matched Search Results

  • 74LS14

    Hex Schmitt-Trigger Inverter

    SL74LS14 Hex Schmitt-Trigger Inverter This device contains six independent gates each of which performs the logic INVERT function. Each input has hysteresis which increases the noise immunity and transforms a slowly changing input signal to a fast changing, jitter free output. ORDERING INFORMATION SL74LS14N Plastic SL74LS14D SOIC TA = 0° to 70° C for all packages LOGIC DIAGRAM PIN ASSIGNMENT FUNCTION TABLE Inputs A L H PIN 14 =VCC PIN 7 = GND Output Y H L SLS System Logic Semiconductor

    • System Logic Semiconductor System Logic Semiconductor

  • 74LS14

    Hex Inverter with Schmitt Trigger Inputs

    DM74LS14 Hex Inverter with Schmitt Trigger Inputs August 1986 Revised March 2000 DM74LS14 Hex Inverter with Schmitt Trigger Inputs General Description This device contains six independent gates each of which performs the logic INVERT function. Each input has hysteresis which increases the noise immunity and transforms a slowly changing input signal to a fast changing, jitter free output. Ordering Code: Order Number DM74LS14M DM74LS14SJ DM74LS14N Package Number M14A M14D N14A Package Descripti

    • Fairchild Semiconductor Fairchild Semiconductor

  • 74LS14

    Hex Inverter with Schmitt Trigger Inputs

    SN74LS147 SN74LS148 10-Line-to-4-Line and 8-Line-to-3-Line Priority Encoders The SN74LS147 and the SN74LS148 are Priority Encoders. They provide priority decoding of the inputs to ensure that only the highest order data line is encoded. Both devices have data inputs and outputs which are active at the low logic level. The LS147 encodes nine data lines to four-line (8-4-2-1) BCD. The implied decimal zero condition does not require an input condition because zero is encoded when all nine data line

    • ON Semiconductor ON Semiconductor

  • 74LS14

    Hex Schmitt Trigger Inverters

    Unit: mm 19.20 20.32 Max 14 8 6.30 7.40 Max 1 2.39 Max 1.30 7 7.62 0.51 Min 2.54 Min 5.06 Max 2.54 ± 0.25 0.48 ± 0.10 0.25 0.05 0° 15° + 0.10 Hitachi Code JEDEC EIAJ Weight (reference value) DP-14 Conforms Conforms 0.97 g Unit: mm 10.06 10.5 Max 14 8 5.5 1 7 *0.22 ± 0.05 0.20 ± 0.04 2.20 Max 7.80 0.30 1.15 0° 8° + 0.20 1.42 Max 1.27 *0.42 ± 0.08 0.40 ± 0.06 0.10 ± 0.10 0.70 ± 0.20 0.15 0.12 M Hitachi Code JEDEC EIAJ Weight (reference value) FP-14DA Conforms 0.23

    • Hitachi Semiconductor Hitachi Semiconductor

  • 74LS14

    SCHMITT TRIGGERS DUAL GATE/HEX INVERTER

    SCHMITT TRIGGERS DUAL GATE, HEX INVERTER The SN54LS, 74LS13 and SN54LS , 74LS14 contain logic gates , inverters which accept standard TTL input signals and provide standard TTL output levels. They are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. Additionally, they have greater noise margin than conventional inverters. Each circuit contains a Schmitt trigger followed by a Darlington level shifter and a phase splitter driving a TTL tote

    • Motorola Semiconductors Motorola Semiconductors




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