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What is 79RC32364?

This electronic component, produced by the manufacturer "IDT", performs the same function as "RISController Embedded 32-bit Microprocessor".


79RC32364 Datasheet PDF - IDT

Part Number 79RC32364
Description RISController Embedded 32-bit Microprocessor
Manufacturers IDT 
Logo IDT Logo 


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RISControllerTM Embedded 32-bit
Microprocessor, based on
RISCore32300
79RC32364
Features
x High-performance embedded RISControllerTM
microprocessor, based on IDT RISCore32300TM 32-bit CPU
core
– Based on MIPS 32 RISC architecture with enhancements
– Scalar 5-stage pipeline minimizes branch and load delays
– 66 Million multiply accumulate (MAC) Mul-Add/second
@ 133MHz
– 100 and 133 frequencies
x MIPS 32 (ISA) instruction set architecture
– MIPS IV compatible conditional move instructions
– MIPS IV superset PREF (prefetch) instruction
– Fast multiplier with atomic multiply-add, multiply-sub
– Count leading zeros/ones instructions
x Large, efficient on-chip caches
– Separate 8kB Instruction cache and 2kB Data cache
– 2-way set associative
– Write-back and write-through support on a per page basis
– Optional cache locking with “per line” resolution, to facilitate
deterministic response
– Simultaneous instruction and data fetch in each clock cycle,
sustained rate, achieves over 1 GB/sec bandwidth
x Flexible RC4000 compatible MMU with 32-page TLB on-chip
– Variable page size
– Variable number of locked entries
– No performance penalty for address translation
x Flexible bus interface allows simple, low-cost designs
– Bus interface runs at a fraction of pipeline rate
– Programmable port-width interface (8-,16-, 32-bit memory and
I/O regions)
– Programmable bus turnaround times (BTA)
– Supports single data or burst transactions
x Improved real-time support
– Fast interrupt decode
x Low-power operation
– Active power management: powers down inactive units
– Typical power 700mW @ 133MHz
– Stand-by mode <300mW
x Enhanced JTAG interface, for low-cost in-circuit emulation
(ICE)
x MIPS architecture ensures applications software
compatibility throughout the RISController series of
embedded processors
x Industrial temperature range support
x 3.3V operation (core and I/O)
Block Diagram
RISCore32300TM
Extended MIPS 32
Integer CPU Core
MMU RISCore4000 Compatible
w/ System Control
TLB Coprocessor (CPO)
8kB I-Cache,
2-set, lockable
2kB D-Cache, 2-set,
lockable, write-back/write-through
Clock
Generation
Unit
RISCore32300 Internal Bus Interface
RC32364 Bus Interface Unit
The IDT logo is a registered trademark and ORION, RC4650, RC4640, RV4640, RC4600, RC3081, RC3052, RC3051, RC3041, RISController, and RISCore are trademarks of Integrated Device Technology, Inc.
2000 Integrated Device Technology, Inc.
1 of 21
*Notice: The information in this document is subject to change without notice
June 20, 2000
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79RC32364 equivalent
79RC32364™
RC32364 also provides Ack*, Retry*, and BusErr* signals. This device
also provides I/D* signals, to indicate whether instructions or data is
being transferred. The Last* signal is provided to indicate that the last
data transfer is in progress.
The RC32364 provides six external interrupt signals: INT*[5:0] and
a non-maskable interrupt (NMI*) signal.
To share the system interface bus, the RC32364 provides BusReq*
and BusGnt* signals to interface external DMA masters. To allow the
external master control of the external bus, a DMA arbiter is provided.
The RC32364 supports a variable bus width interface, enabling the
CPU to operate with a mix of 8-bit, 16-bit, and 32-bit wide memories.
To indicate the width of the memory or I/O space being accessed, the
RC32364 provides two output signals, Width[1:0]. The width of various
address spaces is programmed using the Port Width Control Register.
The RC32364’s physical memory is divided into several regions, and
each region’s width can be programmed by using this register. Within
these regions, the bus turnaround time can also be programmed.
Thus, the RC32364 can be simply mated with low-cost external
memory subsystems. The large on-chip caches and the early restart
serve to allow the processor to achieve high-performance even with
such low-cost memory.
The RISCore32300 offers a number of features relevant to low-
power systems, including low-power design, active power manage-
ment and power-down modes of operation. The RISCore32300 is a
static design. The RC32364 supports a WAIT instruction which is
designed to signal the rest of the chip that execution and clocking should
be halted, reducing system power consumption during idle periods.
Typical values for CA at various airflows are shown in Table 2 Note
that the RC32364 implements advanced power management, which
substantially reduces the average power dissipation of the device.
CA
Airflow (ft/min)
144 TQFP
0 200 400 600 800 1000
27 22 20 17 15 14
Table 2 Thermal Resistance (CA) at Various Airflows
Revision History
August 1999: Changed references from MIPS-II to MIPS 32.
Changed references from MIPS-IV to MIPS 64. Changed values in
Clock Parameters Table, System Interface Parameters Table, and
Power Consumption Table. Deleted Several Timing Diagrams. Added
JTAG TIming Diagram.
Jan. 12, 2000: Corrected information regarding the TRST* signal in
Table 3. TRST* requires an external pull-down on the board.
April 4, 2000: Adjusted values for DCLK in the System Interface
Parameters table. Added Power Curves.
June 20, 2000: Changed times for the Data Output Hold, TDO
Output Delay Time, and TPC Output Delay Time parameters in the
System Interface Parameters table. Revised values for PCST Output
Delay Time in System Interface Parameters table.
Thermal Considerations
The RC32364 is a low-power CPU, consuming approximately 0.9W
peak power. Thus, no special packaging considerations are required.
The RC32364 is guaranteed in a case temperature range of 0° to
+85° C, for commercial temperature devices; - 40° to +85° for industrial
temperature devices. The type of package, speed (power) of the device,
and airflow conditions affect the equivalent ambient temperature condi-
tions that will meet this specification.
The equivalent allowable ambient temperature, TA, can be calculated
using the thermal resistance from case to ambient (CA) of the given
package. The following equation relates ambient and case tempera-
tures:
TA = TC - P * CA
where P is the maximum power consumption at hot temperature,
calculated by using the maximum ICC specification for the device.
5 of 21
*Notice: The information in this document is subject to change without notice
June 20, 2000


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