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What is TSPC106?

This electronic component, produced by the manufacturer "ATMEL Corporation", performs the same function as "PCI Bus Bridge Memory Controller".


TSPC106 Datasheet PDF - ATMEL Corporation

Part Number TSPC106
Description PCI Bus Bridge Memory Controller
Manufacturers ATMEL Corporation 
Logo ATMEL Corporation Logo 


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Features
Processor Bus Frequency Up to 66 MHz and 83.3 MHz
64-bit Data Bus and 32-bit Address Bus
L2 Cache Control for 256-Kbyte, 512-Kbyte, 1-Mbyte Sizes
Provides Support for Either Asynchronous SRAM, Burst SRAM
or Pipelined Burst SRAM
Compliant with PCI Specification, Revision 2.1
PCI Interface Operates at 20 to 33 MHz, 3.3V/5.0V-compatible
IEEE 1149.1-compliant, JTAG Boundary-scan Interface
PD Max = 1.7 Watts (66 MHz), Full Operating Conditions
Nap, Doze and Sleep Modes Reduce Power Consumption
Fully Compliant with MIL-STD-883 Class Q or According to Atmel Standards
Upscreenings Based on Atmel Standards
Full Military Temperature Range (-55°C Tj +125°C)
– Industrial Temperature Range (-40°C Tj +110°C)
VCC = 3.3V ± 5%
Available in a 303-ball CBGA or a 303-ball CBGA with Solder Column Interposer (SCI)
(CI-CGA) Package
Description
The TSPC106 provides an integrated, high-bandwidth, high-performance, TTL-com-
patible interface between a 60x processor, a secondary (L2) cache or up to a total of
four additional 60x processors, the PCI bus and main memory.
PCI support allows system designers to rapidly design systems using peripherals
already designed for PCI.
The TSPC106 uses an advanced 3.3V CMOS-process technology and maintains full
interface compatibility with TTL devices.
The TSPC106 integrates system testability and debugging features via JTAG bound-
ary-scan capability.
PCI Bus Bridge
Memory
Controller
66-83 MHz
TSPC106
G suffix
CBGA 303
Ceramic Ball Grid Array
GS suffix
CI-CGA 303
Ceramic Ball Grid Array
with Solder Column Interposer (SCI)
Rev. 2102C–HIREL–01/05

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TSPC106 equivalent
TSPC106A
Figure 3. Pin Assignments Shading Ley
NC No connect
VDD Power Supply Positive
VSS Power Supply Ground
AVDD Clock Power Supply Positive (K9)
VIEW
Signals
Pinout
Table 1. TSPC106 Pinout in 303-ball CBGA Package
Signal Name
Pin Number
60x Processor Interface Signals
A[0:31]
R2, P2, N2, M2, L2, K2, J5, K4, K5, K6, J2, J6, J3, J4, H3, H4, H2, G2,
F1, E1, E2, F4, E3, D1, C1, C2, B1, C3, B2, E4, D3, E5
AACK
D2
ARTRY
F2
BG0
K3
BG1 (DIRTY_OUT)
R4
BG2 (TWE)
R5
BG3 (DCS)
T1
BR0 L3
BR1 (DIRTY_IN)
T3
BR2 (TV)
T6
BR3 (BA0)
T5
CI N3
DBG0
L5
DBG1 (TOE)
U4
DBG2 (DWE0)
P3
DBG3 (DWE1)
H11
DBGLB (CKE)
J10
DH[0:31]
T14, R13, R14, P13, P14, N13, U3, W1, V2, W2, V3, W3, V4, W4, V5,
W5, V6, W6, V7, W7, V8, W8, N8, W9, V9, W10, V10, W11, V11, W12,
V12, W13
DL[0:31]
U6, T7, U7, T8, U8, R8, P8, N9, P9, R9, U9, T9, U10, T10, U13, T13,
R12, N14, M13, T2, U1, U2, V1, U15, V16, U14, W16, V15, W15, V14,
W14, V13
GBL
M3
LBCLAIM
N4
Active
High
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
High
High
Low
Low
I/O
I/O
I/O
I/O
Output
Output
Output
Output
Input
Input
Input
Input
I/O
Output
Output
Output
Output
Output
I/O
I/O
I/O
Input
2102C–HIREL–01/05
5


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Part Details

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Information Total 30 Pages
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Featured Datasheets

Part NumberDescriptionMFRS
TSPC106The function is PCI Bus Bridge Memory Controller. ATMEL CorporationATMEL Corporation

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