No | Part number | Description ( Function ) | Manufacturers | |
1 | MC74AC138 | 1-of-8 Decoder / Demultiplexer MC74AC138, MC74ACT138 1-of-8 Decoder/Demultiplexer The MC74AC138/74ACT138 is a high−speed 1−of−8 decoder/demultiplexer. This device is ideally suited for high−speed bipolar memory chip select address decoding. The multiple input enables allow parallel expansion to a 1−of−24 decoder using just three MC74AC138/74ACT138 devices or a 1−of−32 decoder using four MC74 |
ON Semiconductor |
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Recommended search results related to MC74AC138 |
Part No | Description ( Function) | Manufacturers | |
74138 | LOW POWER SCHOTTKY SN74LS138 1-of-8 Decoder/ Demultiplexer The LSTTL / MSI SN74LS138 is a high speed 1-of-8 Decoder / Demultiplexer. This device is ideally suited for high speed bipolar memory chip select address decoding. The multiple input enables allow parallel expansion to a 1-of-24 decoder usi |
ON Semiconductor |
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74138 | Decoder/Demultiplexer DM74LS138 • DM74LS139 Decoder/Demultiplexer August 1986 Revised March 2000 DM74LS138 • DM74LS139 Decoder/Demultiplexer General Description These Schottky-clamped circuits are designed to be used in high-performance memory-decoding or data-routing applications, requiring ver |
Fairchild Semiconductor |
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MC74AC10 | Triple 3-Input NAND Gate MC74AC10, MC74ACT10 co Triple 3-Input t NAND Gate • Outputs Source/Sink 24 mA • ′ACT10 Has TTL Compatible Inputs m w w a D . w 14 1 S a t 13 e e h 12 4U . VCC 11 10 9 8 http://onsemi.com PDIP–14 N SUFFIX CASE 646 14 1 2 3 4 5 6 7 GND 14 Figure 1. Pinout: 14� |
ON Semiconductor |
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MC74AC10 | TRIPLE 3-INPUT NAND GATE MC74AC10 MC74ACT10 Triple 3ĆInput NAND Gate • Outputs Source/Sink 24 mA • ′ACT10 Has TTL Compatible Inputs TRIPLE 3-INPUT NAND GATE VCC 14 13 12 11 10 9 8 N SUFFIX CASE 646-06 PLASTIC 1 2 3 4 5 6 7 GND D SUFFIX CASE 751A-03 PLASTIC MAXIMUM RA |
Motorola Semiconductors |
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MC74AC109 | Dual JK Positive Edge Triggered Flip-Flop . U 4 Dual JK Positive t e Edge-Triggered Flip-Flop e h The MC74AC109/74ACT109 consists of two high – speed S transition clocked completely independent JK flip–flops. The clocking a t operation a is independent of rise and fall times of the clock waveform. The JK design allow |
ON Semiconductor |
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Vishay |
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ON Semiconductor |
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