No | Part number | Description ( Function ) | Manufacturers | |
1 | 74F114PC | Dual JK Negative Edge-Triggered Flip-Flop with Common Clocks and Clears 74F114 Dual JK Negative Edge-Triggered Flip-Flop April 1988 Revised August 1999 74F114 Dual JK Negative Edge-Triggered Flip-Flop with Common Clocks and Clears General Description The 74F114 contains two high-speed JK flip-flops with common Clock and Clear inputs. Synchronous state changes are initiated by the falling edge of the clock. Triggering occurs at a voltage level of |
Fairchild Semiconductor |
0  1  2  3  4  5  6  7  8 9 |
Recommended search results related to 74F114PC |
Part No | Description ( Function) | Manufacturers | |
74F114 | Dual JK Negative Edge-Triggered Flip-Flop with Common Clocks and Clears 74F114 Dual JK Negative Edge-Triggered Flip-Flop April 1988 Revised August 1999 74F114 Dual JK Negative Edge-Triggered Flip-Flop with Common Clocks and Clears General Description The 74F114 contains two high-speed JK flip-flops with common Clock and Clear inputs. Synchronous st |
Fairchild Semiconductor |
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74F114SC | Dual JK Negative Edge-Triggered Flip-Flop with Common Clocks and Clears 74F114 Dual JK Negative Edge-Triggered Flip-Flop April 1988 Revised August 1999 74F114 Dual JK Negative Edge-Triggered Flip-Flop with Common Clocks and Clears General Description The 74F114 contains two high-speed JK flip-flops with common Clock and Clear inputs. Synchronous st |
Fairchild Semiconductor |
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NEC |
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