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What is uPD46185094B?

This electronic component, produced by the manufacturer "Renesas", performs the same function as "18M-BIT QDR II SRAM 4-WORD BURST OPERATION".


uPD46185094B Datasheet PDF - Renesas

Part Number uPD46185094B
Description 18M-BIT QDR II SRAM 4-WORD BURST OPERATION
Manufacturers Renesas 
Logo Renesas Logo 


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μPD46185084B
μPD46185094B
μPD46185184B
μPD46185364B
Datasheet
18M-BIT QDRTM II SRAM
4-WORD BURST OPERATION
Description
R10DS0113EJ0200
Rev.2.00
Nov 09, 2012
The μPD46185084B is a 2,097,152-word by 8-bit, the μPD46185094B is a 2,097,152-word by 9-bit, the
μPD46185184B is a 1,048,576-word by 18-bit and the μPD46185364B is a 524,288-word by 36-bit synchronous
quad data rate static RAM fabricated with advanced CMOS technology using full CMOS six-transistor memory
cell.
The μPD46185084B, μPD46185094B, μPD46185184B and μPD46185364B integrate unique synchronous
peripheral circuitry and a burst counter. All input registers controlled by an input clock pair (K and K#) are
latched on the positive edge of K and K#. These products are suitable for application which require
synchronous operation, high speed, low voltage, high density and wide bit configuration.
These products are packaged in 165-pin PLASTIC BGA.
Features
1.8 ± 0.1 V power supply
165-pin PLASTIC BGA (13 x 15)
HSTL interface
PLL circuitry for wide output data valid window and future frequency scaling
Separate independent read and write data ports with concurrent transactions
100% bus utilization DDR READ and WRITE operation
Four-tick burst for reduced address frequency
Two input clocks (K and K#) for precise DDR timing at clock rising edges only
Two output clocks (C and C#) for precise flight time
and clock skew matching-clock and data delivered together to receiving device
Internally self-timed write control
Clock-stop capability. Normal operation is restored in 20 μs after clock is resumed.
User programmable impedance output (35 to 70 Ω)
Fast clock cycle time : 3.3 ns (300 MHz), 4.0 ns (250 MHz)
Simple control logic for easy depth expansion
JTAG 1149.1 compatible test access port
R10DS0113EJ0200 Rev.2.00
Nov 09, 2012
Page 1 of 38

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uPD46185094B equivalent
μPD46185084B, μPD46185094B, μPD46185184B, μPD46185364B
Pin Arrangement
165-pin PLASTIC BGA (13 x 15)
(Top View)
[μPD46185184B]
1M x 18
1234
A CQ# VSS/144M NC/36M
B NC Q9 D9
W#
A
C NC
D NC
E NC
F NC
G NC
H DLL#
J NC
K NC
L NC
M NC
N NC
P NC
NC
D11
NC
Q12
D13
VREF
NC
NC
Q15
NC
D17
NC
D10
Q10
Q11
D12
Q13
VDDQ
D14
Q14
D15
D16
Q16
Q17
VSS
VSS
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSS
VSS
A
R TDO TCK
A
A
5
BW1#
NC
A
VSS
VSS
VDD
VDD
VDD
VDD
VDD
VSS
VSS
A
A
A
678
K# NC/288M R#
K BW0# A
NC A VSS
VSS
VSS
VSS
VSS VSS VDDQ
VSS
VDD
VDDQ
VSS
VDD
VDDQ
VSS
VDD
VDDQ
VSS
VDD
VDDQ
VSS
VDD
VDDQ
VSS VSS VDDQ
VSS
VSS
VSS
A A VSS
CAA
C# A
A
9 10
A VSS/72M
NC NC
NC Q7
NC NC
NC D6
NC NC
NC NC
VDDQ
VREF
NC Q4
NC D3
NC NC
NC Q1
NC NC
NC D0
A TMS
11
CQ
Q8
D8
D7
Q6
Q5
D5
ZQ
D4
Q3
Q2
D2
D1
Q0
TDI
A
D0 to D17
Q0 to Q17
R#
W#
BW0#, BW1#
K, K#
C, C#
CQ, CQ#
ZQ
DLL#
: Address inputs
: Data inputs
: Data outputs
: Read input
: Write input
: Byte Write data select
: Input clock
: Output clock
: Echo clock
: Output impedance matching
: PLL disable
TMS
TDI
TCK
TDO
VREF
VDD
VDDQ
VSS
NC
NC/xxM
: IEEE 1149.1 Test input
: IEEE 1149.1 Test input
: IEEE 1149.1 Clock input
: IEEE 1149.1 Test output
: HSTL input reference input
: Power Supply
: Power Supply
: Ground
: No connection
: Expansion address for xxMb
Remarks 1. ×××# indicates active LOW.
2. Refer to Package Dimensions for the index mark.
3. 2A, 3A, 7A and 10A are expansion addresses : 3A for 36Mb
: 3A and 10A for 72Mb
: 3A, 10A and 2A for 144Mb
: 3A, 10A, 2A and 7A for 288Mb
2A and 10A of this product can also be used as NC.
R10DS0113EJ0200 Rev.2.00
Nov 09, 2012
Page 5 of 38


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On this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for uPD46185094B electronic component.


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Featured Datasheets

Part NumberDescriptionMFRS
uPD46185094BThe function is 18M-BIT QDR II SRAM 4-WORD BURST OPERATION. RenesasRenesas

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