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PDF 74LVC541A Data sheet ( Hoja de datos )
| Número de pieza | 74LVC541A | |
| Descripción | Low-Voltage CMOS Octal Buffer Flow Through Pinout | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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74LVC541A
Product Preview
Low-Voltage CMOS Octal
Buffer Flow Through Pinout
With 5 V−Tolerant Inputs and Outputs
(3−State, Non−Inverting)
The 74LVC541A is a high performance, non−inverting octal buffer
operating from a 1.2 to 3.6 V supply. This device is similar in function
to the MC74LCX244, while providing flow through architecture.
High impedance TTL compatible inputs significantly reduce current
loading to input drivers while TTL compatible outputs offer improved
switching noise performance. A VI specification of 5.5 V allows
74LVC541A inputs to be safely driven from 5 V devices. The
74LVC541A is suitable for memory address driving and all TTL level
bus oriented transceiver applications.
Current drive capability is 24 mA at the outputs. The Output Enable
(OE1. OE2) inputs, when HIGH, disables the output by placing them
in a HIGH Z condition.
Features
• Designed for 1.2 to 3.6 V VCC Operation
• 5 V Tolerant − Interface Capability With 5 V TTL Logic
• Supports Live Insertion and Withdrawal
• IOFF Specification Guarantees High Impedance When VCC = 0 V
• 24 mA Output Sink and Source Capability
• Near Zero Static Supply Current in All Three Logic States (10 mA)
Substantially Reduces System Power Requirements
• Latchup Performance Exceeds 250 mA
• ESD Performance:
♦ Human Body Model > 2000 V
♦ Machine Model > 200 V
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
www.onsemi.com
SOIC−20 WB
DW SUFFIX
CASE 751D
TSSOP−20
DT SUFFIX
CASE 948E
MARKING DIAGRAMS
20
LVC541A
AWLYYWWG
1
SOIC−20 WB
20
LVC
541A
ALYW G
G
1
TSSOP−20
A = Assembly Location
L, WL = Wafer Lot
Y, YY = Year
W, WW = Work Week
G or G = Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
This document contains information on a product under development. ON Semiconductor
reserves the right to change or discontinue this product without notice.
© Semiconductor Components Industries, LLC, 2015
April, 2015 − Rev. P0
1
Publication Order Number:
74LVC541A/D
1 page  
74LVC541A
AC ELECTRICAL CHARACTERISTICS (tR = tF = 2.5 ns)
−405C to +855C
−405C to +1255C
Symbol
Parameter
Conditions
Min Typ1 Max Min Typ1 Max Unit
tpd Propagation Delay (Note 6)
nAn to nYn
VCC = 1.2 V
− 14.0 −
−
VCC = 1.65 V to 1.95 V 1.5 6.5 13.8 1.5
−−
− 16.0
ns
VCC = 2.3 V to 2.7 V 1.0 3.5 6.8 1.0 − 7.9
VCC = 2.7 V
1.5 3.5 5.6 1.5 − 7.0
VCC = 3.0 V to 3.6 V 1.0 2.9 5.1 1.0 − 6.5
ten Enable Time (Note 7)
nOE to nYn
VCC = 1.2 V
− 20.0 −
−
VCC = 1.65 V to 1.95 V 1.8 7.7 16.0 1.8
−−
− 18.5
ns
VCC = 2.3 V to 2.7 V
1.5 4.3 8.8 1.5
− 10.2
VCC = 2.7 V
1.5 4.4 7.5 1.5 − 9.5
VCC = 3.0 V to 3.6 V 1.0 3.5 7.0 1.0 − 9.0
tdis Disable Time (Note 8)
nOE to nYn
VCC = 1.2 V
− 11.0 −
−
VCC = 1.65 V to 1.95 V 3.0 4.9 10.3 3.0
−−
− 11.9
ns
VCC = 2.3 V to 2.7 V 1.0 2.7 5.9 1.0 − 6.8
VCC = 2.7 V
1.5 3.7 7.0 1.5 − 9.0
VCC = 3.0 V to 3.6 V 1.0 3.3 6.0 1.0 − 7.5
tsk(0) Output Skew Time (Note 9)
− − 1 − − 1.5 ns
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
5. Typical values are measured at TA = 25°C and VCC = 3.3 V, unless stated otherwise.
6. tpd is the same as tPLH and tPHL.
7. ten is the same as tPZL and tPZH.
8. tdis is the same as tPLZ and tPHZ.
9. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
DYNAMIC SWITCHING CHARACTERISTICS
Symbol
Characteristic
Condition
TA = +25°C
Min Typ Max
Unit
VOLP
Dynamic LOW Peak Voltage (Note 10) VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V
VCC = 2.5 V, CL = 30 pF, VIH = 2.5 V, VIL = 0 V
0.8
0.6
V
VOLV
Dynamic LOW Valley Voltage (Note
10)
VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V
VCC = 2.5 V, CL = 30 pF, VIH = 2.5 V, VIL = 0 V
−0.8
−0.6
V
10. Number of outputs defined as “n”. Measured with “n−1” outputs switching from HIGH−to−LOW or LOW−to−HIGH. The remaining output is
measured in the LOW state.
CAPACITIVE CHARACTERISTICS
Symbol
Parameter
Condition
CIN Input Capacitance
VCC = 3.3 V, VI = 0 V or VCC
COUT Output Capacitance
VCC = 3.3 V, VI = 0 V or VCC
CPD Power Dissipation Capacitance
(Note 11)
Per input; VI = GND or VCC
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
11. CPD is used to determine the dynamic power dissipation (PD in mW).
PD = CPD * VCC2 x fi * N + S (CL x VCC2 x fo) where:
fi = input frequency in MHz; fo = output frequency in MHz
CL = output load capacitance in pF VCC = supply voltage in Volts
N = number of outputs switching
S(CL * VCC2 x fo) = sum of the outputs.
Typical
4.0
5.0
7.7
11.3
14.4
Unit
pF
pF
pF
www.onsemi.com
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