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Número de pieza | MC97F60128 | |
Descripción | CMOS single-chip 8-bit MCU | |
Fabricantes | ABOV | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de MC97F60128 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
No Preview Available ! CMOS single-chip 8-bit MCU
with 128 Kbytes Flash Code
Memory
Main features
8-bit Microcontroller compatible with MCS® 51 products
Basic MCU Function
– 128 Kbytes Flash Code Memory
– 8,448 bytes SRAM
Built-in Analog Function
– Power-On Reset and Low Voltage Detect Reset
– Internal 8MHz RC Oscillator (±1.5%,TA= 0 ~ +50 °C)
– Watchdog Timer RC Oscillator (5 kHz)
Peripheral features
– 12-bit Analog to Digital Converter (15 inputs)
– 12-bit Digital to Analog Converter (1 output)
– Fine ADPCM decoder (32kbps @fs = 8 kHz)
– UART 8-bit x 3-ch
– SPI 8-bit x 2-ch
– USI 8-bit UART x 2-ch, 8-bit SPI x 2-ch, 8-bit I2C x 2-ch
I/O and packages
– Up to 88 programmable I/O lines with 100 LQFP
– 100 LQFP, 80 LQFP, 64 LQFP
– Pb-free package
Operating conditions
– 1.8 V to 5.5V wide voltage range
– -40°C to 85°C temperature range
Application
– Home Appliance
– Voice Decoder
MC97F60128
MC97F68128
1M2C897F66128
User’s manual
V 1.2
Revised 15 October, 2015
1 page MC97F60128
1.3 Ordering information
Device name
MC97F60128L
MC97F68128L
MC97F68128L14
MC97F67128LB14
MC97F66128LB14
Flash
128 Kbytes
Table 1-1
Ordering Information of MC97F60128
XRAM
8,192 bytes
ABOV Semiconductor Co., Ltd.
IRAM
256 bytes
Package
100 LQFP-1414
80 LQFP-1212
80 LQFP-1414
64 LQFP-1414
64 LQFP-1414
5
5 Page MC97F60128
ABOV Semiconductor Co., Ltd.
P00/AN0/EINT0/BLNK
P01/AN1/EINT1
P02/AN2/EINT2
P03/AN3/EINT3
P04/AN4/EINT4
P05/AN5/EINT5
P06/AN6/EINT6
P07/AN7/EINT7
AVREF
RUNFLAG
AVSS
RESETB
P17/XOUT
P16/XIN
VSS1
SXIN
SXOUT
VDD1
VREG
LPF
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
MC97F68128L
(80LQFP-1212),
MC97F68128L14
(80LQFP-1414)
60 P86/SEG16
59 P87/SEG17
58 P50/SEG18/RXD4
57 P51/SEG19/TXD4
56 P52/SEG20/RXD3
55 P53/SEG21/TXD3
54 P54/SEG22/SS1
53 P55/SEG23/SCK1
52 P56/SEG24/TXD1/SDA1/MOSI1
51 P57/SEG25/RXD1/SCL1/MISO1
50 P40/SEG29/EC0
49 P41/SEG30/EC1
48 P42/SEG31/EC2
47 P43/SEG32/EINT10/T0O/PWM0O
46 P44/SEG33/EINT11/T1O/PWM1O
45 P45/SEG34/EINT12/T2O/PWM2O
44 P46/SEG35/BUZO
43 P47/SEG36/SS0
42 P30/SEG37/SCK0
41 P31/SEG38/TXD0/SDA0/MOSI0
NOTE)
1. On On-Chip Debugging, ISP uses P1[5:4] pin as DSDA, DSCL.
2. The P9, PA, PB and PD pins should be selected as a push-pull output or an input with pull-up
resistor by software control when the 80-pin package is used.
3. The pin in parentheses can be configured by software control.
Figure 3.2
MC97F68128L/L14 80LQFP pin assignment
11
11 Page |
Páginas | Total 30 Páginas | |
PDF Descargar | [ Datasheet MC97F60128.PDF ] |
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