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PDF STB6N62K3 Data sheet ( Hoja de datos )

Número de pieza STB6N62K3
Descripción N-channel Power MOSFET
Fabricantes STMicroelectronics 
Logotipo STMicroelectronics Logotipo



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STB6N62K3
STD6N62K3
N-channel 620 V, 0.95 Ω, 5.5 A SuperMESH3™ Power MOSFET
in D²PAK, DPAK
Features
Order codes
STB6N62K3
STD6N62K3
VDSS
620 V
RDS(on)
max.
< 1.2 Ω
ID Pw
5.5 A 90 W
100% avalanche tested
Extremely high dv/dt capability
Gate charge minimized
Very low intrinsic capacitance
Improved diode reverse recovery
characteristics
Zener-protected
Applications
Switching applications
Description
These SuperMESH3™ Power MOSFETs are the
result of improvements applied to
STMicroelectronics’ SuperMESH™ technology,
combined with a new optimized vertical structure.
These devices boast an extremely low on-
resistance, superior dynamic performance and
high avalanche capability, rendering them suitable
for the most demanding applications.
Table 1. Device summary
Order codes
STB6N62K3
STD6N62K3
Marking
6N62K3
TAB
3
1
D²PAK
TAB
3
1
DPAK
Figure 1. Internal schematic diagram
D(2,TAB)
G(1)
S(3)
AM01476v1
Package
D²PAK
DPAK
Packaging
Tape and reel
December 2011
Doc ID 022605 Rev 1
1/19
www.st.com
19

1 page




STB6N62K3 pdf
STB6N62K3, STD6N62K3
Electrical characteristics
Table 6. Switching times
Symbol
Parameter
td(on)
tr
td(off)
tf
Turn-on delay time
Rise time
Turn-off-delay time
Fall time
Test conditions
VDD = 310 V, ID = 2.75 A,
RG = 4.7 Ω, VGS = 10 V
(see Figure 17)
Min.
-
Typ.
22
12
49
20
Max. Unit
ns
ns
-
ns
ns
Table 7.
Symbol
Source drain diode
Parameter
Test conditions
Min. Typ. Max. Unit
ISD
ISDM (1)
VSD (2)
Source-drain current
Source-drain current (pulsed)
Forward on voltage
ISD = 5.5 A, VGS = 0
trr
Qrr
IRRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD = 5.5 A, di/dt = 100 A/µs
VDD = 60 V (see Figure 22)
trr
Qrr
IRRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD = 5.5 A, di/dt = 100 A/µs
VDD = 60 V, Tj = 150 °C
(see Figure 22)
1. Pulse width limited by safe operating area
2. Pulsed: pulse duration = 300 µs, duty cycle 1.5%
5.5 A
-
27 A
- 1.5 V
290
- 1900
13.5
ns
nC
A
335
- 2400
14.5
ns
nC
A
Table 8. Gate-source Zener diode
Symbol
Parameter
Test conditions
V(BR)GSO
Gate-source breakdown
voltage (ID = 0)
Igs=± 1 mA
Min. Typ. Max. Unit
30 - V
The built-in back-to-back Zener diodes have specifically been designed to enhance not only
the device’s ESD capability, but also to make them safely absorb possible voltage transients
that may occasionally be applied from gate to source. In this respect the Zener voltage is
appropriate to achieve an efficient and cost-effective intervention to protect the device’s
integrity. These integrated Zener diodes thus avoid the usage of external components.
Doc ID 022605 Rev 1
5/19

5 Page





STB6N62K3 arduino
STB6N62K3, STD6N62K3
Table 9. D²PAK (TO-263) mechanical data
Dim.
A
A1
b
b2
c
c2
D
D1
E
E1
e
e1
H
J1
L
L1
L2
R
V2
Min.
4.40
0.03
0.70
1.14
0.45
1.23
8.95
7.50
10
8.50
4.88
15
2.49
2.29
1.27
1.30
mm
Typ.
2.54
0.4
Package mechanical data
Max.
4.60
0.23
0.93
1.70
0.60
1.36
9.35
10.40
5.28
15.85
2.69
2.79
1.40
1.75
Doc ID 022605 Rev 1
11/19

11 Page







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