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PDF 74LVC273A Data sheet ( Hoja de datos )

Número de pieza 74LVC273A
Descripción OCTAL D-TYPE FLIP-FLOP
Fabricantes Diodes 
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74LVC273A
OCTAL D-TYPE FLIP-FLOP WITH CLEAR
Description
The 74LVC273A provides eight positive-edge-triggered D-type flip-
flops with a direct clear (CLR) input.
The device is designed for operation with a power supply range of
1.65V to 3.6V. The device is fully specified for partial power down
applications using IOFF. The IOFF circuitry disables the output preventing
damaging current backflow when the device is powered down.
Features
Supply Voltage Range from 1.65V to 3.6V
Sinks or Sources 24mA at VCC = 3V
CMOS Low Power Consumption
IOFF Supports Partial Power Down Operation
Inputs or Outputs accept up to 5.5V
Inputs Can Be Driven by 3.3V or 5V Allowing for Mixed Voltage
Applications
Schmitt Trigger Action at All Inputs
Typical VOLP (Quiet Output Ground Bounce) less than 0.8V with
VCC = 3.3V and TA = +25°C
Typical VOHV (Quiet Output dynamic VOH) greater than 2.0V with
VCC = 3.3V and TA = +25°C
ESD Protection Tested per JESD 22
ƒ Exceeds 200-V Machine Model (A115-A)
ƒ Exceeds 2000-V Human Body Model (A114-A)
ƒ Exceeds 1000-V Charged Device Model (C101C)
Latch-Up Exceeds 250mA per JESD 78, Class II
All devices are:
ƒ Totally Lead-Free & Fully RoHS compliant (Notes 1 & 2)
ƒ Halogen and Antimony Free. “Green” Device (Note 3)
Pin Assignments
Applications
General Purpose Logic
Bus Driving
Power Down Signal Isolation
Wide array of products such as:
ƒ PCs, Notebooks, Netbooks, Ultrabooks
ƒ Networking Computer Peripherals, Hard Drives, CD/DVD
ROM
ƒ TV, DVD, DVR, Set Top Box
Notes:
1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant.
2. See http://www.diodes.com/quality/lead_free.html for more information about Diodes Incorporated’s definitions of Halogen and Antimony free,
"Green" and Lead-Free.
3. Halogen and Antimony free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and
<1000ppm antimony compounds.
74LVC273A
Document number: DS35892 Rev. 1 - 2
1 of 10
www.diodes.com
June 2014
© Diodes Incorporated

1 page




74LVC273A pdf
74LVC273A
Switching Characteristics
Symbol
fMAX
tW
tW
tSU
tH
tREM
tPD
tPD
tsk(0)
Parameter Test Conditions
Maximum
Frequency
Figure 1
Pulse Width
CLK
High or Low
Pulse Width
CLR Low
Figure 1
Figure 1
Set-up Time DN
to CLK
Figure 1
Hold Time
DN to CLK
Removal Time
CLR to CLK
Propagation
Delay
CLK to QN
Propagation
Delay
CLR to QN
Output Skew
Time
Figure 1
Figure 1
Figure 1
Figure 1
VCC
1.8V ± 0.15V
2.5V ± 0.3V
2.7V
3.3V ± 0.3
1.8V ± 0.15V
2.5V ± 0.3V
2.7V
3.3V ± 0.3V
1.8V ± 0.15V
2.5V ± 0.3V
2.7V
3.3V ± 0.3V
1.8V ± 0.15V
2.5V ± 0.3V
2.7V
3.3V ± 0.3V
1.8V ± 0.15V
2.5V ± 0.3V
2.7V
3.3V ± 0.3V
1.8V ± 0.15V
2.5V ± 0.3V
2.7V
3.3V ± 0.3V
1.8V ± 0.15V
2.5V ± 0.3V
2.7V
3.3V ± 0.3V
1.8V ± 0.15V
2.5V ± 0.3V
2.7V
3.3V ± 0.3V
3.3V ± 0.3V
TA = +25°C
Min Typ Max
35 40
75 60
150 175
150 230
5.0 2.5
4.0 2.0
3.3 1.7
3.0 1.5
5.0 2.5
4.0 2.0
3.3 1.7
3.0 1.5
4.0 2.0
3.0 1.5
2.0 1.0
1.5 1.0
3.0 1.5
2.0 1.0
1.5 1.0
1.5 1.0
1 7.8 16.5
149
1 4.4 8.3
1.7 4.1 7.3
1 7.8 16.5
149
1 4.4 8.3
1.7 4.1 7.3
1 7.8 16.5
149
1 4.4 8.3
1.7 4.1 7.3
1.0
-40°C to +85°C
Min Max
35
50
150
150
5.0
4.0
3.3
3.0
5.0
4.0
3.3
3.0
4.0
3.0
2.0
1.5
3.0
2.0
1.5
1.5
1 17
1 9.5
1 8.5
1.7 7.5
1 17
1 9.5
1 8.5
1.7 7.5
1 17
1 9.5
1 8.5
1.7 7.5
+85°C to +125°C
Min Max
30
45
100
125
5.5
4.5
3.5
3.5
5.5
4.5
3.5
3.5
4.5 tSU
3.5
2.5
2.0
3.5
2.5
2.0
2.0
1 14.2
1 8.2
1 10.0
1.7 9.0
1 14.2
1 8.2
1 10.0
1.7 9.0
1 14.2
1 8.2
1 10.0
1.7 9.0
1.5
Unit
Mhz
ns
ns
ns
ns
ns
ns
ns
ns
Operating Characteristics
TA = +25°C
Symbol
Parameter
Test Conditions
Cpd
Power dissipation
capacitance per gate
F = 10 MHz
VCC
1.8V ± 0.15V
2.5V ± 0.3V
3.3V ± 0.3V
TYP
9.9
10.2
10.6
Unit
pF
Package Characteristics
Symbol
θJA
θJC
θJA
θJC
Parameter
Thermal Resistance
Junction-to-Ambient
Thermal Resistance
Junction-to-Case
Thermal Resistance
Junction-to-Ambient
Thermal Resistance
Junction-to-Case
Package
TSSOP-20
Test Conditions
Min
Typ
Max Unit
(Note 9)
— 74 — °C/W
TSSOP-20
(Note 9)
— 15 — °C/W
V-QFN4525-20
(Note 9)
— 67 — °C/W
V-QFN4525-20
(Note 9)
— 20 — °C/W
Note:
9. Test conditions for TSSOP-20 and V-QFN4525-20: Devices mounted on 4 layer FR-4 substrate PC board, 2oz copper, with minimum recommended
pad layout per JESD 51-7.
74LVC273A
Document number: DS35892 Rev. 1 - 2
5 of 10
www.diodes.com
June 2014
© Diodes Incorporated

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