STM32F401RB Datasheet PDF - STMicroelectronics
Part Number | STM32F401RB | |
Description | ARM Cortex-M4 32b MCU+FPU | |
Manufacturers | STMicroelectronics | |
Logo | ||
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ARM® Cortex®-M4 32b MCU+FPU, 105 DMIPS,
256KB Flash/64KB RAM, 11 TIMs, 1 ADC, 11 comm. interfaces
Datasheet - production data
Features
• Core: ARM® 32-bit Cortex®-M4 CPU with FPU,
Adaptive real-time accelerator (ART
Accelerator™) allowing 0-wait state execution
from Flash memory, frequency up to 84 MHz,
memory protection unit, 105 DMIPS/
1.25 DMIPS/MHz (Dhrystone 2.1), and DSP
instructions
• Memories
– Up to 256 Kbytes of Flash memory
– Up to 64 Kbytes of SRAM
• Clock, reset and supply management
– 1.7 V (PDR OFF) or 1.8 V (PDR ON) to
3.6 V application supply and I/Os
– POR, PDR, PVD and BOR
– 4-to-26 MHz crystal oscillator
– Internal 16 MHz factory-trimmed RC
– 32 kHz oscillator for RTC with calibration
– Internal 32 kHz RC with calibration
• Power consumption
– Run: 137 µA/MHz (peripheral off)
– Stop (Flash in Stop mode, fast wakeup
time): 42 µA typ @ 25 °C;
65 µA max @25 °C
– Stop (Flash in Deep power down mode,
slow wakeup time): down to 10 µA typ@
25 °C; 28 µA max @25 °C
– Standby: 2.4 µA @25 °C / 1.7 V without
RTC; 12 µA @85 °C @1.7 V
– VBAT supply for RTC: 1 µA @25 °C
• 1×12-bit, 2.4 MSPS A/D converter: up to 16
channels
• General-purpose DMA: 16-stream DMA
controllers with FIFOs and burst support
• Up to 11 timers: up to six 16-bit, two 32-bit
timers up to 84 MHz, each with up to 4
IC/OC/PWM or pulse counter and quadrature
(incremental) encoder input, two watchdog
timers (independent and window) and a
SysTick timer
WLCSP49
(3 x 3 mm)
UFQFPN48
(7 × 7 mm)
LQFP100 (14 × 14 mm)
LQFP64 (10 × 10 mm)
)%*$
UFBGA100
(7 x 7 mm)
• Debug mode
– Serial wire debug (SWD) & JTAG
interfaces
– Cortex-M4 Embedded Trace Macrocell™
• Up to 81 I/O ports with interrupt capability
– All IO ports 5 V tolerant
– Up to 78 fast I/Os up to 42 MHz
• Up to 11 communication interfaces
– Up to 3 × I2C interfaces (1Mbit/s,
SMBus/PMBus)
– Up to 3 USARTs (2 x 10.5 Mbit/s, 1 x
5.25 Mbit/s), ISO 7816 interface, LIN, IrDA,
modem control)
– Up to 4 SPIs (up to 42 Mbits/s at fCPU = 84
MHz), SPI2 and SPI3 with muxed full-
duplex I2S to achieve audio class accuracy
via internal audio PLL or external clock
– SDIO interface
• Advanced connectivity
– USB 2.0 full-speed device/host/OTG
controller with on-chip PHY
• CRC calculation unit
• 96-bit unique ID
• RTC: subsecond accuracy, hardware calendar
Table 1. Device summary
Reference
Part number
STM32F401xB
STM32F401CB, STM32F401RB,
STM32F401VB
STM32F401xC
STM32F401CC, STM32F401RC,
STM32F401VC
May 2014
This is information on a product in full production.
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STM32F401xB STM32F401xC
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
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Table 31.
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Table 38.
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Table 40.
Table 41.
Table 42.
Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
STM32F401xB/C features and peripheral counts. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Regulator ON/OFF and internal power supply supervisor availability. . . . . . . . . . . . . . . . . 25
Timer feature comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Comparison of I2C analog and digital filters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
USART feature comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Legend/abbreviations used in the pinout table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
STM32F401xB/STM32F401xC pin definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Alternate function mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
STM32F401xB/STM32F401xC register boundary addresses . . . . . . . . . . . . . . . . . . . . . . 52
Voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Thermal characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Features depending on the operating power supply range . . . . . . . . . . . . . . . . . . . . . . . . 61
VCAP1/VCAP2 operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Operating conditions at power-up / power-down (regulator ON) . . . . . . . . . . . . . . . . . . . . 63
Operating conditions at power-up / power-down (regulator OFF). . . . . . . . . . . . . . . . . . . . 63
Embedded reset and power control block characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 64
Typical and maximum current consumption, code with data processing (ART
accelerator disabled) running from SRAM - VDD =1.8V . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Typical and maximum current consumption, code with data processing (ART
accelerator disabled) running from SRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Typical and maximum current consumption in run mode, code with data processing
(ART accelerator enabled except prefetch) running from Flash memory- VDD = 1.8 V . . . 67
Typical and maximum current consumption in run mode, code with data processing
(ART accelerator enabled except prefetch) running from Flash memory - VDD = 3.3 V . . 67
Typical and maximum current consumption in run mode, code with data processing
(ART accelerator disabled) running from Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Typical and maximum current consumption in run mode, code with data processing
(ART accelerator enabled with prefetch) running from Flash memory . . . . . . . . . . . . . . . . 68
Typical and maximum current consumption in Sleep mode . . . . . . . . . . . . . . . . . . . . . . . . 69
Typical and maximum current consumptions in Stop mode - VDD=1.8 V . . . . . . . . . . . . . . 69
Typical and maximum current consumption in Stop mode - VDD=3.3 V. . . . . . . . . . . . . . . 70
Typical and maximum current consumption in Standby mode - VDD=1.8 V . . . . . . . . . . . . 70
Typical and maximum current consumption in Standby mode - VDD=3.3 V . . . . . . . . . . . . 70
Typical and maximum current consumptions in VBAT mode. . . . . . . . . . . . . . . . . . . . . . . . 71
Switching output I/O current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Peripheral current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
Low-power mode wakeup timings(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
High-speed external user clock characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
Low-speed external user clock characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
HSE 4-26 MHz oscillator characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
LSE oscillator characteristics (fLSE = 32.768 kHz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
HSI oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
LSI oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
Main PLL characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
PLLI2S (audio PLL) characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
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