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TC74ACT574FW Datasheet PDF - Toshiba Semiconductor

Part Number TC74ACT574FW
Description Octal D-Type Flip-Flop with 3-State Output
Manufacturers Toshiba Semiconductor 
Logo Toshiba Semiconductor Logo 



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TC74ACT574FW datasheet, circuit
TC74ACT574P/F/FW/FT
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74ACT574P,TC74ACT574F,TC74ACT574FW,TC74ACT574FT
Octal D-Type Flip-Flop with 3-State Output
The TC74ACT574 is an advanced high speed CMOS OCTAL
FLIP-FLOP fabricated with silicon gate and double-layer metal
wiring C2MOS technology.
It achieves the high speed operation similar to equivalent
Bipolar Schottky TTL while maintaining the CMOS low power
dissipation.
This devices may be used as a level converter for interfacing
TTL or NMOS to High Speed CMOS. The inputs are compatible
with TTL, NMOS and CMOS output voltage levels.
These 8-bit D-type flip-flops are controlled by a clock input
(CK) and a output enable input ( OE ).
When the OE input is high, the eight outputs are in a high
impedance state.
All inputs are equipped with protection circuits against static
discharge or transient excess voltage.
Features
High speed: fmax = 180 MHz (typ.) at VCC = 5 V
Low power dissipation: ICC = 8 µA (max) at Ta = 25°C
Compatible with TTL outputs:
VIL = 0.8 V (max), VIH = 2.0 V (min)
Symmetrical output impedance:
|IOH| = IOL = 24 mA (min) Capability of driving 50
transmission lines.
Balanced propagation delays: tpLH ∼− tpHL
Pin and function compatible with 74F574
Note: xxxFW (JEDEC SOP) is not available in
Japan.
TC74ACT574P
TC74ACT574F
TC74ACT574FW
TC74ACT574FT
Weight
DIP20-P-300-2.54A
: 1.30 g (typ.)
SOP20-P-300-1.27A
: 0.22 g (typ.)
SOP20-P-300-1.27
: 0.22 g (typ.)
SOL20-P-300-1.27
: 0.46 g (typ.)
TSSOP20-P-0044-0.65A : 0.08 g (typ.)
1
2006-02-01

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TC74ACT574FW equivalent
TC74ACT574P/F/FW/FT
AC Characteristics (CL = 50 pF, RL = 500 , input: tr = tf = 3 ns)
Characteristics
Propagation delay
time
(CK-Q)
Output enable time
Output disable time
Maximum clock
frequency
Input capacitance
Output capacitance
Power dissipation
capacitance
Symbol
tpLH
tpHL
tpZL
tpZH
tpLZ
tpHZ
fmax
CIN
COUT
CPD
Test Condition
VCC (V)
Ta = 25°C
Min Typ. Max
5.0 ± 0.5
6.2 10.1
5.0 ± 0.5
6.3 10.5
5.0 ± 0.5
6.6 9.6
5.0 ± 0.5 85 160
5 10
10
(Note) 33
Ta =
40 to 85°C
Min Max
Unit
1.0 11.5 ns
1.0 12.0 ns
1.0 11.0 ns
85 MHz
10 pF
― ― pF
― ― pF
Note:
CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating
current consumption without load.
Average operating current can be obtained by the equation:
ICC (opr) = CPD·VCC·fIN + ICC/8 (per F/F)
And the total CPD when n pcs. of F/F operate can be gained by the following equation:
CPD (total) = 21 + 12·n
5 2006-02-01

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Information Total 11 Pages
Download[ TC74ACT574FW.PDF Datasheet ]

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Featured Datasheets

Part NumberDescriptionManufacturers
TC74ACT574FThe function is Octal D-Type Flip-Flop with 3-State Output.Toshiba Semiconductor
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TC74ACT574FTThe function is Octal D-Type Flip-Flop with 3-State Output.Toshiba Semiconductor
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TC74ACT574FWThe function is Octal D-Type Flip-Flop with 3-State Output.Toshiba Semiconductor
Toshiba Semiconductor

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