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PDF MB95F263K Data sheet ( Hoja de datos )
| Número de pieza | MB95F263K | |
| Descripción | 8-bit Microcontrollers | |
| Fabricantes | Fujitsu Media Devices | |
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FUJITSU MICROELECTRONICS
DATA SHEET
DS07–12627–1E
8-bit Microcontrollers
CMOS
F2MC-8FX MB95260H/270H/280H Series
MB95F262H/F262K/F263H/F263K/F264H/F264K
MB95F272H/F272K/F273H/F273K/F274H/F274K
MB95F282H/F282K/F283H/F283K/F284H/F284K
■ DESCRIPTION
MB95260H/270H/280H are series of general-purpose, single-chip microcontrollers. In addition to a compact
instruction set, the microcontrollers of these series contain a variety of peripheral resources.
Note: F2MC is the abbreviation of FUJITSU Flexible Microcontroller.
■ FEATURES
• F2MC-8FX CPU core
Instruction set optimized for controllers
• Multiplication and division instructions
• 16-bit arithmetic operations
• Bit test branch instructions
• Bit manipulation instructions, etc.
• Clock (main OSC clock and sub-OSC clock are only available in MB95F262H/F262K/F263H/F263K/F264H/
F264K/F282H/F282K/F283H/F283K/F284H/F284K)
• Selectable main clock source
Main OSC clock (up to 16.25 MHz, maximum machine clock frequency: 8.125 MHz)
External clock (up to 32.5 MHz, maximum machine clock frequency: 16.25 MHz)
Main internal CR clock (1/8/10 MHz ±3%, maximum machine clock frequency: 10 MHz)
• Selectable subclock source
Sub-OSC clock (32.768 kHz)
External clock (32.768 kHz)
Sub-internal CR clock (Typ: 100 kHz, Min: 50 kHz, Max: 200 kHz)
• Timer
• 8/16-bit composite timer
• Timebase timer
• Watch prescaler
• LIN-UART (MB95F262H/F262K/F263H/F263K/F264H/F264K/F282H/F282K/F283H/F283K/F284H/F284K)
• Full duplex double buffer
• Capable of clock-synchronized serial data transfer and clock-asynchronized serial data transfer
(Continued)
Copyright©2008 FUJITSU MICROELECTRONICS LIMITED All rights reserved
2008.12
1 page  
MB95260H/270H/280H Series
• MB95270H Series
Part number
MB95F272H MB95F273H MB95F274H MB95F272K MB95F273K MB95F274K
Parameter
Type
Flash memory product
Clock
supervisor
counter
It supervises the main clock oscillation.
Program ROM
capacity
8 Kbytes
12 Kbytes 20 Kbytes
8 Kbytes
12 Kbytes 20 Kbytes
RAM capacity 240 bytes 496 bytes 496 bytes 240 bytes 496 bytes 496 bytes
Low-voltage
detection reset
No
Yes
Reset input
Dedicated
Selected by software
Number of basic instructions
: 136
Instruction bit length
: 8 bits
CPU functions
Instruction length
Data bit length
: 1 to 3 bytes
: 1, 8 and 16 bits
Minimum instruction execution time : 61.5 ns (with machine clock = 16.25 MHz)
Interrupt processing time
: 0.6 µs (with machine clock = 16.25 MHz)
General-
purpose I/O
I/O ports (Max): 4
CMOS: 3
N-ch: 1
I/O ports (Max): 5
CMOS: 3
N-ch: 2
Timebase timer Interrupt cycle : 0.256 ms to 8.3 s (when external clock = 4 MHz)
Hardware/ Reset generation cycle
software
Main oscillation clock at 10 MHz: 105 ms (Min)
watchdog timer The sub-internal CR clock can be used as the source clock of the hardware watchdog timer.
Wild register It can be used to replace three bytes of data.
LIN-UART No LIN-UART
8/10-bit A/D 2 channels
converter
8-bit or 10-bit resolution can be selected.
1 channel
8/16-bit
composite
timer
The timer can be configured as an "8-bit timer × 2 channels" or a "16-bit timer × 1 channel".
It has built-in timer function, PWC function, PWM function and input capture function.
Count clock: it can be selected from internal clocks (seven types) and external clocks.
It can output square wave.
External
interrupt
2 channels
Interrupt by edge detection (The rising edge, falling edge, or both edges can be selected.)
It can be used to wake up the device from standby modes.
On-chip debug
1-wire serial control
It supports serial writing. (asynchronous mode)
Watch
prescaler
Eight different time intervals can be selected.
It supports automatic programming, Embedded Algorithm,
write/erase/erase-suspend/erase-resume commands.
Flash memory
It has a flag indicating the completion of the operation of Embedded Algorithm.
Number of write/erase cycles (Min): 100000
Data retention time: 20 years
Flash security feature for protecting the content of the Flash memory
Standby mode Sleep mode, stop mode, watch mode, timebase timer mode
Package
DIP-8P-M03
FPT-8P-M08
DS07–12627–1E
5
5 Page 
MB95260H/270H/280H Series
■ PIN DESCRIPTION (MB95260H Series, 24 pins)
Pin no.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
Pin name
PF0
X0
NC
PF1
X1
VSS
PG2
X1A
PG1
X0A
VCC
C
PF2
RST
P62
TO10
NC
P63
TO11
P64
EC1
NC
P00
AN00
P01
AN01
P02
INT02
AN02
SCK
I/O
circuit
type*
Function
General-purpose I/O port
B
Main clock input oscillation pin
— It is an internally connected pin. Always leave it unconnected.
General-purpose I/O port
B
Main clock I/O oscillation pin
— Power supply pin (GND)
General-purpose I/O port
C
Subclock I/O oscillation pin
General-purpose I/O port
C
Subclock input oscillation pin
— Power supply pin
— Capacitor connection pin
General-purpose I/O port
A Reset pin
This is a dedicated reset pin in MB95F262H/F263H/F264H.
General-purpose I/O port
D High-current port
8/16-bit composite timer ch. 1 output pin
— It is an internally connected pin. Always leave it unconnected.
General-purpose I/O port
D High-current port
8/16-bit composite timer ch. 1 output pin
General-purpose I/O port
D
8/16-bit composite timer ch. 1 clock input pin
— It is an internally connected pin. Always leave it unconnected.
General-purpose I/O port
E
A/D converter analog input pin
General-purpose I/O port
E
A/D converter analog input pin
General-purpose I/O port
External interrupt input pin
E
A/D converter analog input pin
LIN-UART clock I/O pin
(Continued)
DS07–12627–1E
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet MB95F263K.PDF ] | |
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