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PDF MMUN2111LT1G Data sheet ( Hoja de datos )

Número de pieza MMUN2111LT1G
Descripción Bias Resistor Transistors
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MMUN2111LT1G Series
Bias Resistor Transistors
PNP Silicon Surface Mount Transistors
with Monolithic Bias Resistor Network
This new series of digital transistors is designed to replace a single
device and its external resistor bias network. The BRT (Bias Resistor
Transistor) contains a single transistor with a monolithic bias network
consisting of two resistors; a series base resistor and a base-emitter
resistor. The BRT eliminates these individual components by
integrating them into a single device. The use of a BRT can reduce
both system cost and board space. The device is housed in the SOT-23
package which is designed for low power surface mount applications.
Features
Simplifies Circuit Design
Reduces Board Space
Reduces Component Count
The SOT-23 package can be soldered using wave or reflow. The
modified gull-winged leads absorb thermal stress during soldering
eliminating the possibility of damage to the die.
Available in 8 mm embossed tape and reel.
These Devices are PbFree, Halogen Free/BFR Free and are RoHS
Compliant
MAXIMUM RATINGS (TA = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
Collector-Base Voltage
VCBO
Collector-Emitter Voltage
VCEO
Collector Current
IC
THERMAL CHARACTERISTICS
50 Vdc
50 Vdc
100 mAdc
Characteristic
Symbol
Max
Unit
Total Device Dissipation
TA = 25°C
Derate above 25°C
PD
246 (Note 1)
mW
400 (Note 2)
2.0 (Note 1)
mW/°C
3.2 (Note 2)
Thermal Resistance,
Junction-to-Ambient
RqJA
508 (Note 1)
311 (Note 2)
°C/W
Thermal Resistance,
Junction-to-Lead
RqJL
174 (Note 1)
208 (Note 2)
°C/W
Junction and Storage,
Temperature Range
TJ, Tstg
55 to +150
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. FR4 @ Minimum Pad
2. FR4 @ 1.0 x 1.0 inch Pad
http://onsemi.com
PIN 1
BASE
(INPUT)
R1
R2
PIN 3
COLLECTOR
(OUTPUT)
PIN 2
EMITTER
(GROUND)
3
1
2
SOT23
CASE 318
STYLE 6
MARKING
DIAGRAM
A6x M G
G
1
A6x = Device Code
x = A L (Refer to page 2)
M = Date Code*
G = PbFree Package
(Note: Microdot may be in either location)
*Date Code orientation may vary depending
upon manufacturing location.
ORDERING INFORMATION
Device
Package
Shipping
MMUN21xxLT1G SOT23 3000/Tape & Reel
(PbFree)
MMUN21xxLT3G SOT23 10000/Tape & Reel
(PbFree)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
DEVICE MARKING INFORMATION
See specific marking information in the device marking table
on page 2 of this data sheet.
© Semiconductor Components Industries, LLC, 2009
August, 2009 Rev. 10
1
Publication Order Number:
MMUN2111LT1/D

1 page




MMUN2111LT1G pdf
250
200
150
100
50
0
-50
1000
100
MMUN2111LT1G Series
TYPICAL ELECTRICAL CHARACTERISTICS
MMUN2111LT1
1
IC/IB = 10
RqJA = 625°C/W
 0.1
TA = -25°C
75°C
25°C
0 50 100
TA, AMBIENT TEMPERATURE (°C)
Figure 1. Derating Curve
 0.01
150 0
VCE = 10 V
TA = 75°C
25°C
-25°C
4
3
2
1
20  40  60
IC, COLLECTOR CURRENT (mA)
Figure 2. VCE(sat) versus IC
 80
f = 1 MHz
lE = 0 V
TA = 25°C
10
1
10
100
0
0
10
20
30 40
50
IC, COLLECTOR CURRENT (mA)
VR, REVERSE BIAS VOLTAGE (VOLTS)
Figure 3. DC Current Gain
Figure 4. Output Capacitance
100 75°C 25°C
10 TA = -25°C
1
 0.1
 0.01
VO = 5 V
 0.001
0 1  2  3  4  5  6  7  8  9 10
Vin, INPUT VOLTAGE (VOLTS)
Figure 5. Output Current versus Input Voltage
100
VO = 0.2 V
10
1
TA = -25°C
25°C
75°C
 0.1
0
10
 20  30
 40  50
IC, COLLECTOR CURRENT (mA)
Figure 6. Input Voltage versus Output Current
http://onsemi.com
5

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MMUN2111LT1G arduino
1
IC/IB = 10
0.1
25°C
0.01
MMUN2111LT1G Series
TYPICAL ELECTRICAL CHARACTERISTICS
MMUN2132LT1
1000
75°C
25°C
100
10
TA = 25°C
75°C
VCE = 10 V
25°C
0.001
0
10 20 30 40
IC, COLLECTOR CURRENT (mA)
Figure 32. VCE(sat) versus IC
1
50 1
10
IC, COLLECTOR CURRENT (mA)
Figure 33. DC Current Gain
100
12
f = 1 MHz
10 lE = 0 V
TA = 25°C
8
6
4
2
0
0 5 10 15 20 25 30 35 40 45 50
VR, REVERSE BIAS VOLTAGE (VOLTS)
Figure 34. Output Capacitance
100
75°C
10
1
25°C
TA = 25°C
0.1
0.01
VO = 5 V
0.001
01
23 45 67 8
Vin, INPUT VOLTAGE (VOLTS)
9 10
Figure 35. Output Current versus Input Voltage
10
TA = 25°C
1 75°C 25°C
VO = 0.2 V
0.1
0
10 20 30 40
IC, COLLECTOR CURRENT (mA)
50
Figure 36. Input Voltage versus Output Current
http://onsemi.com
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