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GM71C17400CLJ-6 Datasheet PDF - Hynix Semiconductor

Part Number GM71C17400CLJ-6
Description CMOS DYNAMIC RAM
Manufacturers Hynix Semiconductor 
Logo Hynix Semiconductor Logo 

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GM71C17400CLJ-6 datasheet, circuit
GM71C(S)17400C/CL
4,194,304 WORDS x 4 BIT
CMOS DYNAMIC RAM
Description
The GM71C(S)17400C/CL is the new
generation dynamic RAM organized 4,194,304
words x 4 bit. GM71C(S)17400C/CL has
realized higher density, higher performance and
various functions by utilizing advanced CMOS
process technology. The GM71C(S)17400C/CL
offers Fast Page Mode as a high speed access
mode. Multiplexed address inputs permit the
GM71C(S)17400C/CL to be packaged in a
standard 300 mil 24(26) pin SOJ, and a standard
300 mil 24(26) pin plastic TSOP II. The
package size provides high system bit densities
and is compatible with widely available
automated testing and insertion equipment.
System oriented features include single power
supply 5.0V+/-10% tolerance, direct interfacing
capability with high performance logic families
such as Schottky TTL.
Pin Configuration
24(26) SOJ
Features
* 4,194,304 Words x 4 Bit Organization
* Fast Page Mode Capability
* Single Power Supply (5.0V+/-10%)
* Fast Access Time & Cycle Time
(Unit: ns)
GM71C(S)17400C/CL-5
GM71C(S)17400C/CL-6
GM71C(S)17400C/CL-7
tRAC tCAC tRC
50 13 90
60 15 110
70 18 130
tPC
35
40
45
* Low Power
Active : 660/605/550mW (MAX)
Standby : 11mW (CMOS level : MAX)
: 0.83mW (L-version : MAX)
* RAS Only Refresh, CAS before RAS Refresh,
Hidden Refresh Capability
* All inputs and outputs TTL Compatible
* 2048 Refresh Cycles/32ms
* 2048 Refresh Cycles/128ms (L-version)
* Battery backup operation (L-version)
* Test function : 16bit parallel test mode
24(26) TSOP II
VCC 1
I/O1 2
I/O2 3
WE 4
RAS 5
NC 6
A10 8
A0 9
A1 10
A2 11
A3 12
VCC 13
26 VSS
25 I/O4
24 I/O3
23 CAS
22 OE
21 A9
19 A8
18 A7
17 A6
16 A5
15 A4
14 VSS
VCC 1
I/O1 2
I/O2 3
WE 4
RAS 5
A11 6
A10 8
A0 9
A1 10
A2 11
A3 12
VCC 13
26 VSS
25 I/O4
24 I/O3
23 CAS
22 OE
21 A9
19 A8
18 A7
17 A6
16 A5
15 A4
14 VSS
(Top View)
Rev 0.1 / Apr’01

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1 page
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GM71C17400CLJ-6 equivalent
Read Cycle
Symbol
Parameter
tRAC Access Time from RAS
tCAC Access Time from CAS
tAA Access Time from Address
tOAC Access Time from OE
tRCS Read Command Setup Time
tRCH Read Command Hold Time to CAS
tRRH Read Command Hold Time to RAS
tRAL Column Address to RAS Lead Time
tCAL Column Address to CAS Lead Time
tCLZ CAS to Output in low-Z
tOH Output Data Hold Time
tOHO Output Data Hold Time from OE
tOEZ Output Buffer Turn-off Time to OE
tOFF Output Buffer Turn-off Time
tCDD CAS to DIN Delay Time
GM71C(S)17400C/CL
GM71C(S)17400 GM71C(S)17400 GM71C(S)17400
C/CL-5
C/CL-6
C/CL-7
Min Max Min Max Min Max
Unit
- 50 - 60 - 70 ns
- 13 - 15 - 18 ns
- 25 - 30 - 35 ns
- 13 - 15 - 18
0 -0- 0-
0 -0- 0-
5 -5- 5-
25 - 30 - 35 -
25 - 30 - 35 -
0 -0- 0-
3 -3- 3-
3 -3- 3-
- 13 - 15 - 15
- 13 - 15 - 15
13 - 15 - 18 -
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note
8,9,20
9,11,
17,20
9,10,
17,20
9
12
12
13
13
5
Write Cycle
Symbol
Parameter
tWCS Write Command Setup Time
tWCH Write Command Hold Time
tWP Write Command Pulse Width
tRWL Write Command to RAS Lead Time
tCWL Write Command to CAS Lead Time
tDS Data-in Setup Time
tDH Data-in Hold Time
GM71C(S)17400 GM71C(S)17400 GM71C(S)17400
C/CL-5
C/CL-6
C/CL-7
Min Max Min Max Min Max
Unit
0 - 0 - 0 - ns
7 - 10 - 15 - ns
7 - 10 - 10 - ns
13 - 15 - 18 - ns
13 - 15 - 18 - ns
0 - 0 - 0 - ns
7 - 10 - 15 - ns
Note
14
15
15
Rev 0.1 / Apr’01

5 Page
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Information Total 10 Pages
Download[ GM71C17400CLJ-6.PDF Datasheet ]

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