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PDF uP7704 Data sheet ( Hoja de datos )
| Número de pieza | uP7704 | |
| Descripción | 2A Ultra Low Dropout Linear Regulator | |
| Fabricantes | uPI Semiconductor | |
| Logotipo |  |
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uP7704
2A Ultra Low Dropout Linear Regulator
General Description
Features
The uP7704 is a 2A ultra low dropout linear regulator
specifically designed for motherboard, notebook and graphic
card applications. This device works with dual supplies, a
control input for the control circuitry and a power input as
low as 1.2V for providing current to output. The uP7704
delivers high-current and ultra-low-drop output voltage as
low as 0.8V for applications where VOUT is very close to
VIN.
The uP7704 features comprehensive control and protection
functions: a power on reset (POR) circuit for monitoring
both control and power inputs for proper operation; an EN
input for enabling or disabling the device, a power OK with
time delay for indicating the output voltage status, a
foldback current limit function, and a thermal shutdown
function.
The uP7704 is available in PSOP-8 or WDFN3x3-10L
packages with very low thermal resistance.
Applications
Desktop PCs, Notebooks, and Workstations
Graphic Cards
Low Voltage Logic Supplies
Microprocessor and Chipset Supplies
Split Plane Microprocessor Supplies
Advanced Graphics Cards Supplies
SoundCards and Auxiliary Power Supplies
SMPS Post Regulators
Works with 1.2V~5.5V VIN
Adjustable Output Voltage, Down to 0.8V
1.5% Initial Accuracy
Excellent Line and Load Regulation
2A Guaranteed Output Current
300mV @ 2A Dropout Voltage
Very Low On-Resistance
150mΩ typical
VOUT Pull Low Resistance when Disabled
VOUT Power OK Signal
Fast Transient Response
Low External Component Count
Low Cost and Easy to Use
Enable Pin
Over Current and Over Temperature Protection
Ordering Information
Order Number
uP7704U8
uP7704ADDA
Package Type
PSOP-8
WDFN3x3-10L
Remark
Note: uPI products are compatible with the current IPC/
JEDEC J-STD-020 and RoHS requirements. They are 100%
matte tin (Sn) plating and suitable for use in SnPb or Pb-
free soldering processes.
Pin Configuration & Typical Application Circuit
POK
EN
VIN
CNTL
18
27
GND
36
45
PSOP-8
GND
FB
VOUT
NC
VOUT 1
VOUT 2
VOUT 3
FB 4
POK 5
GND
10 CNTL
9 VIN
8 VIN
7 VIN
6 EN
WDFN3x3-10L
5VCC
R4
10R
VIN
C1
1uF
C2
4.7uF
CNTL
EN
POK
R3
VIN
10K
VOUT
VOUT
R2
12.5K C4
option
FB
NC
R1 C3
10K 10uF
GND
uPI Semiconductor Corp., http://www.upi-semi.com
Rev. F00, File Name: uP7704-DS-F0001
1
1 page  
uP7704
Absolute Maximum Rating
Control Input Voltage VCNTL (Note 1) ------------------------------------------------------------------------------------------------- -0.3V to +7V
Power Input Voltage VIN-------------------------------------------------------------------------------------------------------------------- -0.3V to +7V
Other Pins --------------------------------------------------------------------------------------------------------------- -0.3V to (VCNTL + 0.3V)
Storage Temperature Range ----------------------------------------------------------------------------------------------------------- -65OC to +150OC
Junction Temperature ------------------------------------------------------------------------------------------------------------------------------------ 150OC
Lead Temperature (Soldering, 10 sec) ------------------------------------------------------------------------------------------------------------ 260OC
ESD Rating (Note 2)
HBM (Human Body Mode) --------------------------------------------------------------------------------------------------------------------- 2kV
MM (Machine Mode) ----------------------------------------------------------------------------------------------------------------------------- 200V
Thermal Information
Package Thermal Resistance (Note 3)
PSOP-8 θJA ---------------------------------------------------------------------------------------------------------------------------------- 52°C/W
PSOP-8 θJC ---------------------------------------------------------------------------------------------------------------------------------- 5°C/W
WDFN3x3-10L θJA -------------------------------------------------------------------------------------------------------------------------- 60°C/W
WDFN3x3-10L θJC ------------------------------------------------------------------------------------------------------------------------- 5°C/W
Power Dissipation, PD @ TA = 25°C
PSOP-8 ------------------------------------------------------------------------------------------------------------------------------------------- 1.9W
WDFN3x3-10L θJA -------------------------------------------------------------------------------------------------------------------------- 1.67W
Recommended Operation Conditions
Operating Junction Temperature Range (Note 4) ------------------------------------------------------------------------ -40°C to +125°C
Operating Ambient Temperature Range -------------------------------------------------------------------------------------- -40°C to +85°C
Supply Input Voltage, VCNTL ------------------------------------------------------------------------------------------------------------ +3.0V to +5.5V
Power Input Voltage, VIN ------------------------------------------------------------------------------------------------------------ +1.0V to VCNTL
(VCNTL = 5V, TA = 25OC, unless otherwise specified)
Electrical Characteristics
Parameter
Symbol Test Conditions
Min Typ Max Units
Supply Input Voltage
Control Input Voltage
POR Threshold
POR Hysteresis
Power Input Voltage
Control Input Current in
Shutdown
Control Input Current
Quiescent Current
Feedback Voltage
VCNTL
V
CNTLRTH
VCNTLHYS
VIN
VOUT = VREF
VOUT = VREF
ICNTL_SD VCNTL = VIN = 5.0V, IOUT = 0A, VEN = 0V
ICNTL
IQ
VCNTL = VIN = VEN = 5.0V, IOUT = 0A, VOUT = VREF
VCNTL = VIN = VEN = 5.0V, IOUT = 0A, VOUT = VREF
2.9 --
6
2.5 2.7 2.9
V
V
0.1 0.2 --
1.0 -- VCNTL
V
V
-- 20 30 uA
-- 0.3 0.6 mA
-- 0.3 0.6 mA
Reference Voltage
Feedback Input Current
VIN Line Regulation
VCNTL Line Regulation
VREF
VCNTL = VIN = VEN = 5.0V, IOUT = 0A. VOUT = VREF
IFB
VREF(LINE)
1.2V < VIN < 5.0V, VCNTL = VEN = 5.0V, IOUT = 0A. VOUT =
VREF
VREF(CNTL) 3.0V < VCNTL < 5.0V,VIN = 1.2V, IOUT = 0A. VOUT = VREF
0.788 0.8 0.812
-- 20 --
V
nA
-- 0.01 0.1 %/V
-- 0.01 0.1 %/V
uPI Semiconductor Corp., http://www.upi-semi.com
Rev. F00, File Name: uP7704-DS-F0001
5
5 Page 
uP7704
Application Information
θJC is on the exposed pad for PSOP-8 package.
Given power dissipation PD, ambient temperature and
thermal
resistance
θ
,
JA
the
junction
temperature
is
calculated as:
TJ = TA + ΔTJA = TA + PD x θJA
To limit the junction temperature within its maximum rating,
the allowable maximum power dissipation is calculated
as:
PD(MAX) = ( TJ(MAX) -TA ) /θJA
where TJ(MAX) is the maximum operation junction
temperature 125OC, T is the ambient temperature and the
A
θJA is the junction to ambient thermal resistance. θJA of
PSOP-8 packages is 75OC/W on JEDEC 51-7 (4 layers,
2S2P) thermal test board with minimum copper area. The
maximum power dissipation at T = 25OC can be calculated
A
as:
PD(MAX) = (125OC - 25OC) / 75OC/W = 1.33W
The thermal resistance θJA highly depends on the PCB
design. Copper plane under the exposed pad is an effective
heatsink and is useful for improving thermal conductivity.
Figure 3 show the relationship between thermal resistance
θJA vs. copper area on a standard JEDEC 51-7 (4 layers,
2S2P) thermal test board at TA = 25OC. A 50mm2 copper
plane reduces θJA from 75OC/W to 52OC/W and increases
maximum power dissipation from 1.33W to 1.9W.
Figure 4. Recommended PCB Layout.
Layout Consideration
1. Place a local bypass capacitor as closed as possible
to the VIN pin. Use short and wide traces to minimize
parasitic resistance and inductance.
2. The exposed pad should be soldered on GND plane
with maximum area and with multiple vias to inner layer
of ground place for improving thermal performance.
3. Connect voltage divider directly to the point where
regulation is required. Place voltage divider close to
the device.
100
90
80
70
60
50
40
30
0 10
20 30 40 50 60 70
Copper Area (mm2)
Figure 3. Thermal Resistance θJA vs. Copper Area
Figure 4 illustrated the recommended PCB layout for best
thermal performance.
uPI Semiconductor Corp., http://www.upi-semi.com
Rev. F00, File Name: uP7704-DS-F0001
11
11 Page | ||
| Páginas | Total 13 Páginas | |
| PDF Descargar | [ Datasheet uP7704.PDF ] | |
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