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PDF T650QVJ02.0 Data sheet ( Hoja de datos )
| Número de pieza | T650QVJ02.0 | |
| Descripción | TFT LCD Module | |
| Fabricantes | AUO | |
| Logotipo |  |
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T650QVJ02.0 Product Specification
Rev 1.0
Model Name: T650QVJ02.0
Issue Date : 2013/04/23
( )Preliminary Specifications
(＊)Final Specifications
Customer Signature
Date AUO
Date
Approved By
_________________________________
Approval By PM Director
CP Wang
____________________________________
Note
Reviewed By RD Director
Eugene CC Chen
____________________________________
Reviewed By Project Leader
Stanley Lo
____________________________________
Prepared By PM
Mick Chen
____________________________________
© Copyright AUO Optronics Corp. 2009 All Rights Reserved.
Page 1 / 38
1 page  
T650QVJ02.0 Product Specification
Rev 1.0
2. Absolute Maximum Ratings
The followings are maximum values which, if exceeded, may cause faulty operation or damage to the unit
Item
Logic/LCD Drive Voltage
Input Voltage of Signal
Operating Temperature
Operating Humidity
Storage Temperature
Storage Humidity
Panel Surface Temperature
Symbol
VDD
Vin
TOP
HOP
TST
HST
PST
Min
-0.3
-0.3
0
10
-20
10
Max
14
4
+50
90
+60
90
65
Unit
[Volt]
[Volt]
[oC]
[%RH]
[oC]
[%RH]
[oC]
Conditions
Note 1
Note 1
Note 2
Note 2
Note 2
Note 2
Note 3
Note 1: Duration:50 msec.
℃Note 2 : Maximum Wet-Bulb should be 39 and No condensation.
℃The relative humidity must not exceed 90% non-condensing at temperatures of 40 or less. At temperatures greater
℃ ℃than 40 , the wet bulb temperature must not exceed 39 .
℃Note 3: Surface temperature is measured at 50 Dry condition
© Copyright AUO Optronics Corp. 2009 All Rights Reserved.
Page 5 / 38
5 Page 
T650QVJ02.0 Product Specification
Rev 1.0
3.2.2: LVDS Pin-Assignment
LCD connector: 187059-51221-1 (JAE, LVDS connector)
187060-41221-1 (JAE, LVDS connector)
Mating connector:
PIN Symbol
Description
1 N.C
2 SCL
3 N.C
AUO Internal Use Only
I2C Serial Clock
AUO Internal Use Only
4 SDA
I2C Serial Data
5 N.C
AUO Internal Use Only
6 N.C
AUO Internal Use Only
7 SELLVDS
8 N.C
9 N.C
LVDS Format Select
Open/High(3.3V) for JEIDA,
Low(GND) for NS
AUO Internal Use Only
AUO Internal Use Only
10 N.C
AUO Internal Use Only
11 GND
Ground
12 CH1_0-
LVDS Channel 1, Signal 0-
13 CH1_0+
LVDS Channel 1, Signal 0+
14 CH1_1-
LVDS Channel 1, Signal 1-
15 CH1_1+
LVDS Channel 1, Signal 1+
16 CH1_2-
17 CH1_2+
18 GND
19 CH1_CLK-
20 CH1_CLK+
21 GND
LVDS Channel 1, Signal 2-
LVDS Channel 1, Signal 2+
Ground
LVDS Channel 1, Clock -
LVDS Channel 1, Clock +
Ground
PIN Symbol
26 GND
27 GND
28 CH2_0-
29 CH2_0+
30 CH2_1-
31 CH2_1+
32 CH2_2-
33 CH2_2+
34 GND
35 CH2_CLK-
36 CH2_CLK+
37 GND
38 CH2_3-
39 CH2_3+
40 CH2_4-
41 CH2_4+
42 GND
43 N.C
44 GND
45 GND
46 GND
22 CH1_3-
LVDS Channel 1, Signal 3-
47
N.C.
23 CH1_3+
LVDS Channel 1, Signal 3+
48
N.C.
24 CH1_4-
LVDS Channel 1, Signal 4-
49
N.C.
25 CH1_4+
LVDS Channel 1, Signal 4+
50
N.C.
51 N.C.
Description
Ground
Ground
LVDS Channel 2, Signal 0-
LVDS Channel 2, Signal 0+
LVDS Channel 2, Signal 1-
LVDS Channel 2, Signal 1+
LVDS Channel 2, Signal 2-
LVDS Channel 2, Signal 2+
Ground
LVDS Channel 2, Clock -
LVDS Channel 2, Clock +
Ground
LVDS Channel 2, Signal 3-
LVDS Channel 2, Signal 3+
LVDS Channel 2, Signal 4-
LVDS Channel 2, Signal 4+
Ground
AUO Internal Use Only
Ground
Ground
Ground
No connection (for AUO test only.
Do not connect)
No connection (for AUO test only.
Do not connect)
No connection (for AUO test only.
Do not connect)
No connection (for AUO test only.
Do not connect)
No connection (for AUO test only.
Do not connect)
Note: N.C. : please leave this pin unoccupied. It can not be connected by any signal (Low/GND/High).
© Copyright AUO Optronics Corp. 2009 All Rights Reserved.
Page 11 / 38
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