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PDF T645HF02-V1 Data sheet ( Hoja de datos )

Número de pieza T645HF02-V1
Descripción TFT LCD Module
Fabricantes AUO 
Logotipo AUO Logotipo



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No Preview Available ! T645HF02-V1 Hoja de datos, Descripción, Manual

T645HF02 V1 Product Specification
Rev. 1.0
Model Name: T645HF02 V1
Issue Date : 2011/10/06
( )Preliminary Specifications
()Final Specifications
Customer Signature
Approved By
Date AUO
Approval By PM Director
Date
_________________________________ ____________________________________
Note
Reviewed By RD Director
_______________________________
Reviewed By Project Leader
Prepared By PM
© Copyright AUO Optronics Corp. 2010 All Rights Reserved.
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T645HF02-V1 pdf
2. Absolute Maximum Ratings
T645HF02 V1 Product Specification
Rev. 1.0
The followings are maximum values which, if exceeded, may cause faulty operation or damage to the unit
Item
Logic/LCD Drive Voltage
Input Voltage of Signal
Operating Temperature
Operating Humidity
Storage Temperature
Storage Humidity
Panel Surface Temperature
Symbol
VDD
Vin
TOP
HOP
TST
HST
PST
Min
-0.3
-0.3
0
10
-20
10
-
Max
14
4
+50
90
+60
90
65
Unit
[Volt]
[Volt]
[oC]
[%RH]
[oC]
[%RH]
[oC]
Conditions
Note 1
Note 1
Note 2
Note 2
Note 2
Note 2
Note 3
Note 1: Duration:50 msec.
Note 2 : Maximum Wet-Bulb should be 39 and No condensation.
The relative humidity must not exceed 90% non-condensing at temperatures of 40 or less. At temperatures
℃ ℃greater than 40 , the wet bulb temperature must not exceed 39 .
Note 3: Surface temperature is measured at 50 Dry condition
© Copyright AUO Optronics Corp. 2010 All Rights Reserved.
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T645HF02-V1 arduino
LCD connector: FI-RE41S-HF (Manufactured by JAE)
Mating connector: FI-RE41S-HL (Manufactured by JAE)
PIN Symbol
Description
PIN
1 VDD Power Supply, +12V DC Regulated 21
2 VDD Power Supply, +12V DC Regulated 22
3 VDD Power Supply, +12V DC Regulated 23
4 VDD Power Supply, +12V DC Regulated 24
5 VDD Power Supply, +12V DC Regulated 25
6 GND
Ground
26
7 GND
Ground
27
8 GND
Ground
28
9 GND
Ground
29
10 CH1_0-
LVDS Channel 1, Signal 0-
30
11 CH1_0+
LVDS Channel 1, Signal 0+
31
12 CH1_1-
LVDS Channel 1, Signal 1-
32
13 CH1_1+
LVDS Channel 1, Signal 1+
33
14 CH1_2-
LVDS Channel 1, Signal 2-
34
15 CH1_2+
LVDS Channel 1, Signal 2+
35
16 GND
Ground
36
17 CH1_CLK-
LVDS Channel 1, Clock -
37
18 CH1_CLK+
LVDS Channel 1, Clock +
38
19 GND
Ground
39
20 CH1_3-
LVDS Channel 1, Signal 3-
40
41
T645HF02 V1 Product Specification
Rev. 1.0
Symbol
CH1_3+
CH1_4-
CH1_4+
GND
CH3_0-
CH3_0+
CH3_1-
CH3_1+
CH3_2-
CH3_2+
GND
CH3_CLK-
CH3_CLK+
GND
CH3_3-
CH3_3+
CH3_4-
CH3_4+
GND
Reserve
Reserve
Description
LVDS Channel 1, Signal 3+
LVDS Channel 1, Signal 4-
LVDS Channel 1, Signal 4+
Ground
LVDS Channel 3, Signal 0-
LVDS Channel 3, Signal 0+
LVDS Channel 3, Signal 1-
LVDS Channel 3, Signal 1+
LVDS Channel 3, Signal 2-
LVDS Channel 3, Signal 2+
Ground
LVDS Channel 3, Clock -
LVDS Channel 3, Clock +
Ground
LVDS Channel 3, Signal 3-
LVDS Channel 3, Signal 3+
LVDS Channel 3, Signal 4-
LVDS Channel 3, Signal 4+
Ground
AUO Internal Use Only
AUO Internal Use Only
Note 1: All GND (ground) pins should be connected together and should also be connected to the LCD’s
metal frame.
Note 2: All VDD (power input) pins should be connected together.
Note 3: All Reserved pins should be open without voltage input.
Note 4: All NC pins should be open without voltage input
Note 5: Signal should be sent as following sequence: 1st line: right eye, 2nd line: left eye
(T-con on upper side ; Rotate Disable)
© Copyright AUO Optronics Corp. 2010 All Rights Reserved.
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