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PDF GS9023-CFY Data sheet ( Hoja de datos )
| Número de pieza | GS9023-CFY | |
| Descripción | Embedded Audio CODEC | |
| Fabricantes | ETC | |
| Logotipo |  |
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FEATURES
• single chip embedded audio solution
• operates as an embedded audio multiplexer or
demultiplexer
• full support for 48kHz synchronous 20/24 bit audio
• 4 channels of audio per GS9023
• cascadable architecture supports additional audio
channels
• multiplexes and demultiplexes arbitrary ANC data
packets
• support for 143, 177, 270, 360 and 540 Mb/s video
standards
• full processing of audio parity, channel status and
user data
• multiplexes and demultiplexes audio control packets
• EDH generation and insertion when in Multiplex Mode
• 3.3V core with 3.3V or 5V I/O (requires 5V supply)
• complies with SMPTE 272M A, B, and C
APPLICATIONS
SDI Embedded Audio
ORDERING INFORMATION
PART NUMBER
PACKAGE
GS9023-CFY
100 pin LQFP
TEMPERATURE
0°C to 70°C
GENLINX ™II GS9023
Embedded Audio CODEC
PRELIMINARY DATA SHEET
DESCRIPTION
The GS9023 is a highly integrated, single chip solution for
the multiplexing/demultiplexing of digital audio channels
into and out of digital video signals. The GS9023 supports
the multiplexing/demultiplexing of 20 or 24 bit synchronous
audio data with a 48kHz sample rate. Audio signals with
different sample rates may be sample rate converted to
48kHz before and after the GS9023 using audio sample
rate converters.
Each GS9023 supports all the processing required to
handle the multiplexing/demultiplexing of four digital audio
channels. To simplify system design, the GS9023
seamlessly integrates with common AES/EBU digital audio
receivers and transmitters. The cascadable architecture
allows for the multiplexing/demultiplexing of additional
audio channels with no external glue logic.
The GS9023 supports video standards with rates from
143Mb/s to 540Mb/s. When in Multiplex Mode, the GS9023
supports the generation and insertion of EDH information
according to SMPTE RP165. In combination with Gennum’s
GS9032, the GS9023 provides a low power, highly
integrated two chip solution for SDI transmit applications. In
combination with Gennum’s GS7005, the GS9023 provides
a low power, highly integrated two chip solution for SDI
receive applications.
The GS9023 requires a 3.3V power supply for internal core
logic and a 3.3V or 5V power supply for device I/O.
WCINA/B
AINA/B
AUXEN
2
3
AM[2:0]
SAFA/B
CSA/B
UDA/B
VFLA/B
3
8
Convert Input
Data Format
Convert
AES/EBU
Format
MPX
Convert
Control
Code
Add
CRC
S/P
MPX
10
10
Audio
Buffer
MPX
10
10
MUTE
ADDR[3:0]
CS, WE, RE
DATA[7:0]
DIN[9:0]
7
8
10
Control
Registers
Generate
Audio
Packets
8
VM[2:0]
3
Video Detection
& Synchronization
Generate
ANCI area
Arbitrary
Packet
Buffer
9
MPX
10
MPX
Add
10 EDH 10 DOUT[9:0]
9 10
b9=b8
LOCK
PKT[8:0]
MULTIPLEX MODE BLOCK DIAGRAM
EDH_INS
Revision Date: November 2000
Document No. 522 - 45 - 05
GENNUM CORPORATION P.O. Box 489, Stn. A, Burlington, Ontario, Canada L7R 3Y3
Tel. +1 (905) 632-2996 Fax. +1 (905) 632-5946 E-mail: [email protected]
www.gennum.com
1 page  
PIN DESCRIPTIONS (Continued)
NUMBER
SYMBOL
40-48
PKT[8:0]
49
52, 69
53
54
55
56, 57, 59-66
68
PKTEN
NC
WCOUT
AOUTB
AOUTA
DOUT[9:0]
LOCK
70 BUFERR
72-74, 77-81
83
84
85
86-89
91
DATA[7:0]
RE
WE
CS
ADDR[3:0]
ANCI
TYPE
DESCRIPTION
I/O Arbitrary data I/O bus. In Multiplex Mode, the user must input the arbitrary data
packet words starting from the secondary data identification (SDID) to the last
user data word (UDW) according to SMPTE 291M. The GS9023 internally
converts the data to 10 bits by generating the inversion bit (bit 9). The checksum
(CS) word is also generated internally. In Demultiplex Mode, the GS9023 outputs
the arbitrary data packet words starting from the SDID to the last UDW. PKT[8] is
the MSB and PKT[0] is the LSB. See Figures 9 and 13.
I/O Arbitrary data packet enable. In Multiplex Mode, PKTEN must be set HIGH one
PCLK cycle before Arbitrary packet data is input to the device. In Demultiplex
Mode, the output is set HIGH when outputting Arbitrary packet data. See Figures
9 and 13.
N/A No Connect. Do not connect these pins.
O 48kHz word clock for channels 1, 2, 3 and 4. Valid only when operating in
Demultiplex Mode.
O Audio signal output for channels 3 and 4. The AES/EBU digital audio output is bi-
phase mark encoded. In all non-AES/EBU modes, the output is not bi-phase
mark encoded.
O Audio signal output for channels 1 and 2. The AES/EBU digital audio output is bi-
phase mark encoded. In all non-AES/EBU modes, the output is not bi-phase
mark encoded.
O Parallel digital video signal output. DOUT[9] is the MSB and DOUT[0] is the LSB.
O Lock indicator. In Multiplex Mode, when HIGH, the video standard has been
identified, the start of a new video frame has been detected and the device is
multiplexing audio.
NOTE: LOCK will not be set HIGH unless at least one of the audio channel
enable bits is HIGH. See “CHACT” description in Table 14.
In Demultiplex Mode, when HIGH, the video standard has been identified, the
‘lock’ process selected by “ACTSEL” has been validated and the device is
demultiplexing audio. See “ACTSEL” description in Table 15.
NOTE: LOCK remains active regardless of the number of audio samples in the
video stream after ‘lock’ is achieved.
O Buffer error. Indicates when an internal buffer overflow/underflow error has
occurred. Valid only when the device is configured to operate in Demultiplex
Mode.
NOTE: If an internal buffer overflow/underflow condition occurs, the GS9023
does not mute the audio output.
I/O Host Interface data bus. DATA[7] is the MSB and DATA[0] is the LSB.
I Read enable for Host Interface. Active LOW.
I Write enable for Host Interface. Active LOW.
I Chip select for Host Interface. Active LOW.
I Host Interface address bus. ADDR[3] is the MSB and ADDR[0] is the LSB.
I ANCI Selection. Valid in Demultiplex Mode only. When set HIGH, each ancillary
data packet with a DID corresponding to either the audio packet DID, the
extended audio packet DID or the arbitrary packet DID is removed from the
video signal. The data contained in the packets are output at the corresponding
pins. The various DIDs are user programmable in the internal registers and are
accessible via the Host Interface.
NOTE: When ancillary data packets are deleted, the GS9023 does not
recalculate the EDH checkwords.
When set LOW, all ancillary data packets remain in the video signal.
GENNUM CORPORATION
5
522 - 45 - 05
5 Page 
Empty
Video signal before GS9023
Empty
Empty
Video signal after GS9023 Insertion of Audio Group 1 ("CASCADE" = HIGH)
Fig. 4
In cases where an audio data packet does not fit inside the
remaining HANC space, the audio packet is discarded. In
this case, the “ADERR” bit of Host Interface Register #7h is
HIGH indicating an audio packet multiplexing error. The
error bit is cleared once accessed by the Host Interface.
By cascading four GS9023 devices, it is possible to
multiplex up to 16 audio channels (according to SMPTE
272) in a component video signal as shown in Figure 18.
NOTE: In the 525/D1 video format, only 15 channels of 24
bit audio can be multiplexed.
Cascade operation is not recommended with a composite
video signal, as there is insufficient HANC space for more
than four channels of audio. Audio packet insertion is not
guaranteed in this case.
The audio data packet structure as described in SMPTE
272M is shown in Figure 5.
The audio data packets words are defined as follows:
ADF: Ancillary Data Flag. The ancillary data flag marks the
beginning of an ancillary packet and is automatically
generated by the GS9023.
DID: Data ID. Audio data packets corresponding to an
audio group are selected by programming “A20ID[3:0]” of
Host Interface Register #3h for audio groups 1 to 4 as
follows:
Group 1: Fh (2FFh)
Group 2: Dh (1FDh)
Group 3: Bh (1FBh)
Group 4: 9h (2F9h)
NOTE: The six most significant bits of the DID are internally
generated by the GS9023.
DBN: Data Block Number. The data block number is used
when data blocks within a common data ID are to be linked
or to distinguish consecutive data blocks within a common
data ID. The data block number continuously increments
from 1 to 255 and is generated automatically by the
GS9023.
DC: Data Count. The data count represents the number of
user data words to follow (maximum of 255 words). The
data count is automatically generated by the GS9023.
CS: Checksum. The checksum consists of nine bits. The
checksum is used to determine the validity of the words
data ID through user data. It is the sum of the nine least
significant bits of the words data ID through user data. The
checksum is automatically generated by the GS9023.
The serial audio data samples, are mapped into three
contiguous ancillary data words (X, X+1, X+2) as shown in
Table 3.
X X+1 X+2 X X+1 X+2 X X+1 X+2
X X+1 X+2 X X+1 X+2 X X+1 X+2
* The ancillary data flag, ADF, is one word in composite systems (ANSI/SMPTE 259M) and three words
in component systems (ANSI/SMPTE 125M).
Fig. 5: Audio Data Packet Structure with 4 Audio Channels, 1 Audio Group
GENNUM CORPORATION
11
522 - 45 - 05
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