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PDF HCF4053B Data sheet ( Hoja de datos )
| Número de pieza | HCF4053B | |
| Descripción | TRIPLE 2-CHANNEL ANALOG MULTIPLEXER/DEMULTIPLEXER | |
| Fabricantes | STMicroelectronics | |
| Logotipo |  |
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HCF4053B
TRIPLE 2-CHANNEL
ANALOG MULTIPLEXER/DEMULTIPLEXER
s LOW "ON" RESISTANCE : 125Ω (Typ.)
OVER 15V p.p SIGNAL-INPUT RANGE FOR
VDD - VEE = 15V
s HIGH "OFF" RESISTANCE : CHANNEL
LEAKAGE ± 100pA (Typ.) at VDD - VEE = 18V
)s BINARY ADDRESS DECODING ON CHIP
t(ss HIGH DEGREE OF LINEARITY : < 0.5%
DISTORTION TYP. at fIS = 1KHz, VIS = 5 Vpp,
ucVDD - VSS > 10V, RL = 10KΩ
ds VERY LOW QUIESCENT POWER
roDISSIPATION UNDER ALL DIGITAL
CONTROL INPUT AND SUPPLY
PCONDITIONS : 0.2 µW (Typ.)
teat VDD - VSS = VDD - VEE =10V
les MATCHED SWITCH CHARACTERISTICS :
oRON = 5Ω (Typ.) FOR VDD - VEE = 15V
ss WIDE RANGE OF DIGITAL AND ANALOG
bSIGNAL LEVELS : DIGITAL 3 to 20,
OANALOG TO 20V p.p.
-s QUIESCENT CURRENT SPECIF. UP TO 20V
t(s)s 5V, 10V AND 15V PARAMETRIC RATINGS
s INPUT LEAKAGE CURRENT
cII = 100nA (MAX) AT VDD = 18V TA = 25°C
us 100% TESTED FOR QUIESCENT CURRENT
rods MEETS ALL REQUIREMENTS OF JEDEC
JESD13B " STANDARD SPECIFICATIONS
PFOR DESCRIPTION OF B SERIES CMOS
teDEVICES"
oleDESCRIPTION
sThe HCF4053B is a monolithic integrated circuit
Obfabricated in Metal Oxide Semiconductor
DIP SOP
ORDER CODES
PACKAGE
TUBE
DIP
SOP
HCF4053BEY
HCF4053BM1
T&R
HCF4053M013TR
technology available in DIP and SOP packages.
The HCF4053B analog multiplexer/demultiplexer
is a digitally controlled analog switch having low
ON impedance and very low OFF leakage current.
This multiplexer circuit dissipate extremely low
quiescent power over the full VDD - VSS and VDD -
VEE supply voltage range, independent of the
logic state of the control signals.
When a logic "1" is present at the inhibit input
terminal all channel are off. This device is a triple
2-channel multiplexer having three separate
digital control inputs, A, B, and C, and an inhibit
input. Each control input selects one of a pair of
channels which are connected in a single pole
double-throw configuration.
PIN CONNECTION
October 2002
1/10
1 page  
HCF4053B
DYNAMIC ELECTRICAL CHARACTERISTICS (Tamb = 25°C, CL = 50pF, all input square wave rise and
fall time = 20 ns )
Test Condition
Value
Unit
Parameter
VEE
RL
fI
VI
(V) (KΩ) (KHz) (V)
VSS
VDD
(V) (V)
Min. Typ. Max.
Propagation Delay
Time (signal input to
200
VDD
output)
5
10
15
30 60
15 30 ns
11 20
Frequency Response
Channel "ON" (sine
wave input) at
20 log VO/VI = - 3dB
= VSS
t(s)Feed through (all
channels OFF) at
c20 log VO/VI = - 40dB = VSS
1
1
ProduFrequency Signal
Crosstalk at
te20 log VO/VI = -40dB
= VSS
1
soleSine Wave Distortion
bfIS = 1KHz Sine Wave
= VSS
10
- OCONTROL (Address or Inhibit)
)Propagation Delay:
t(sAddress to Signal
OUT (Channels ON
ucor OFF)
0
0
0
-5
rodPropagation Delay:
Inhibit to Signal OUT
P(Channel turning ON)
0
0
0
1
te -10
lePropagation Delay:
oInhibit to Signal OUT
s(Channel turning
ObOFF)
0
0
0
-10
10
5(*)
5(*)
5(*)
2(*)
1 3(*)
5(*)
0
0
0
0
0
0
0
0
VO at Common
OUT/IN
10
VO at any
channel
VO at Common
OUT/IN
10
VO at any
channel
Between any 2
Sections (IN pin
2, OUT pin 14)
10
Between any 2
Sections (lN pin
15, OUT pin 14)
5
10
15
5
10
15
5
5
10
15
5
5
10
15
5
25
MHz
60
10
MHz
8
2.5
6
0.3
0.2
0.12
MHz
%
360 720
160 320
120 240
225 450
360 720
160 320
120 240
200 400
200 450
90 210
70 160
130 300
ns
ns
ns
Address or Inhibit to
Signal Crosstalk
0 10 (1)
0
10
VC = VDD-VSS
(square wave)
65
mV
peak
(1) Both ends of channel.
* Peak to Peak voltage symmetrical about (VDD - VEE ) /2
5/10
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| PDF Descargar | [ Datasheet HCF4053B.PDF ] | |
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