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PDF UBA2036TS Data sheet ( Hoja de datos )
| Número de pieza | UBA2036TS | |
| Descripción | Full bridge control IC | |
| Fabricantes | NXP Semiconductors | |
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UBA2036TS
Full bridge control IC for HID automotive lighting
Rev. 01 — 30 October 2008
Product data sheet
1. General description
The UBA2036 is a high voltage monolithic Integrated Circuit (IC) manufactured in a High
Voltage Silicon On Insulator (HVSOI) process. This circuit is designed for driving
MOSFETs in a full bridge configuration. In addition, it features a disable function, an
internal adjustable oscillator and an external clock input function with a high-voltage level
shifter for driving the bridge. To guarantee an accurate 50 % duty cycle, the oscillator
signal can be passed through a divider before being fed to the output drivers.
The UBA2036 is especially suitable for High Intensity Discharge (HID) lamp drivers for car
headlights, projectors and general lighting applications.
2. Features
I Full bridge driver circuit
I Integrated bootstrap diodes
I 464 V integrated high voltage level shift function to drive HID lamps below ground level
I 550 V series regulator input to make the internal supply
I 550 V maximum bridge voltage
I Accurate bridge disable function
I Input for start-up delay
I Adjustable oscillator frequency
I Selectable frequency divider
I Predefined bridge position during start-up
I Adaptive non-overlap
3. Applications
I The UBA2036 can drive (via the power MOSFETs) any kind of load in a full bridge
configuration
I The circuit is especially designed as a commutator controller for HID lamps in car
headlights, projectors and general lighting applications
4. Ordering information
Table 1. Ordering information
Type number
Package
Name
UBA2036TS
SSOP28
Description
plastic shrink small outline package; 28 leads;
body width 5.3 mm
Version
SOT341-1
1 page  
NXP Semiconductors
UBA2036TS
Full bridge control IC for HID automotive lighting
Table 3. Driver …continued
Gate driver output voltages as function of the logical levels at the pins BD, SU, DD and CLK.
Device
state
BD SU DD CLK GHL
GHR
GLL
GLR
Oscillation 1 - -
state
0 0-
-
-
0 (= VSHL) 0 (= VSHR)
0 (= VSHL) 0 (= VSHR)
0 (= VPGND)
1 (= VVDD)
0 (= VPGND)
1 (= VVDD)
0 11
1
0 (= VSHL) 1 (= VFSR)
1 (= VVDD)
0 (= VPGND)
0 11
0
1 (= VFSL) 0 (= VSHR) 0 (= VPGND) 1 (= VVDD)
0 1 0[1] 1 → 0[2] GHL
GHR
GLL
GLR
[1] If pin DD = 0 the bridge enters the state (oscillation state and pin BD = 0 and pin SU = 1) in the pre-defined
position: VGHL = VFSL, VGLR = VVDD, VGLL = VPGND, and VGHR = VSHR.
[2] Only if the level of pin CLK changes from logical 1 to 0, the level of outputs GHL, GHR, GLL and GLR
changes.
If there is no external clock available, the internal oscillator can be used. The design
equation for the bridge oscillator frequency is shown in Equation 1.
f bridge = -K----o---s--c---×-----R----1o---s--c---×-----C-----o--s---c
(1)
Rosc and Cosc are external components connected to the RC pin (Rosc connected to pin
VDD and Cosc connected to pin SGND). In this situation the pins VDD(CLK), CLK and
VSS(CLK) can be connected to SGND.
The clock signal, coming from either pin RC or pin CLK, is divided by two in order to obtain
a 50 % duty-cycle gate drive signal. This can be achieved by applying a voltage to the DD
input lower than VIL(DD) (e.g. connect pin DD to pin SGND).
7.4 Non-overlap time
In the full bridge configuration the non-overlap time is defined as the time between turning
off the two conducting MOSFETs and turning on the two other MOSFETs. The
non-overlap time is realized by means of an adaptive non-overlap circuit. With an adaptive
non-overlap, the application determines the duration of the non-overlap and makes the
non-overlap time optimal for each frequency. The non-overlap time is determined by the
duration of the falling slope of the relevant half bridge voltage. The occurrence of a slope
is sensed internally. The minimum non-overlap time is internally fixed.
7.5 Start-up delay
A simple resistor-capacitor (RC) filter (R between pin VDD and pin SU; C between pin SU
and pin SGND) or a control signal from a processor can be used to make a start-up delay.
This can be beneficial for those applications in which building up the high voltage takes a
larger amount of time: A start-up delay will ensure that the HID system will not start up
before this high voltage has been reached.
7.6 Bridge disable
The bridge disable function can be used to switch off all the MOSFETs as soon as the
voltage on pin BD exceeds the bridge disable voltage VBD. The bridge disable function
overrules all the other states.
UBA2036TS_1
Product data sheet
Rev. 01 — 30 October 2008
© NXP B.V. 2008. All rights reserved.
5 of 13
5 Page 
NXP Semiconductors
UBA2036TS
Full bridge control IC for HID automotive lighting
13. Revision history
Table 7. Revision history
Document ID
Release date
UBA2036TS_1
20081030
Data sheet status
Product data sheet
Change notice
-
Supersedes
-
UBA2036TS_1
Product data sheet
Rev. 01 — 30 October 2008
© NXP B.V. 2008. All rights reserved.
11 of 13
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