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PDF PSMN1R8-40YLC Data sheet ( Hoja de datos )

Número de pieza PSMN1R8-40YLC
Descripción MOSFET ( Transistor )
Fabricantes NXP Semiconductors 
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PSMN1R8-40YLC
N-channel 40 V 1.8 mΩ logic level MOSFET in LFPAK using
NextPower technology
22 August 2012
Product data sheet
1. Product profile
1.1 General description
Logic level enhancement mode N-channel MOSFET in LFPAK package. This product
is designed and qualified for use in a wide range of industrial, communications and
domestic equipment.
1.2 Features and benefits
High reliability Power SO8 package, qualified to 175°C
Optimised for 4.5V Gate drive utilising NextPower Superjunction technology
Ultra low QG, QGD, & QOSS for high system efficiencies at low and high loads
Ultra low Rdson and low parasitic inductance
1.3 Applications
DC-to-DC converters
Load switching
Power OR-ing
Server power supplies
Sync rectifier
1.4 Quick reference data
Table 1. Quick reference data
Symbol
Parameter
Conditions
VDS drain-source voltage 25 °C ≤ Tj ≤ 175 °C
ID
drain current
Tmb = 25 °C; VGS = 10 V; Fig. 1
Ptot total power dissipation Tmb = 25 °C; Fig. 2
Tj junction temperature
Static characteristics
RDSon
drain-source on-state VGS = 4.5 V; ID = 25 A; Tj = 25 °C;
resistance
Fig. 12
VGS = 10 V; ID = 25 A; Tj = 25 °C;
Fig. 12
Dynamic characteristics
QGD
gate-drain charge
VGS = 4.5 V; ID = 25 A; VDS = 20 V;
Fig. 15; Fig. 14
Min Typ Max Unit
- - 40 V
[1] - - 100 A
- - 272 W
-55 -
175 °C
- 1.8 2.1 mΩ
- 1.5 1.8 mΩ
- 10.9 - nC
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PSMN1R8-40YLC pdf
NXP Semiconductors
PSMN1R8-40YLC
N-channel 40 V 1.8 mΩ logic level MOSFET in LFPAK using NextPower
technology
1
Zth(j-mb) δ = 0.5
(K/W)
0.2
10-1 0.1
0.05
003aaj883
10-2 0.02
P
δ=
tp
T
single shot
tp t
T
10-3
10-6
10-5
10-4
10-3
10-2
10-1
tp (s)
1
Fig. 5. Transient thermal impedance from junction to mounting base as a function of pulse duration
6. Characteristics
Table 6. Characteristics
Symbol
Parameter
Conditions
Static characteristics
V(BR)DSS
drain-source
breakdown voltage
ID = 250 µA; VGS = 0 V; Tj = 25 °C
ID = 250 µA; VGS = 0 V; Tj = -55 °C
VGS(th)
gate-source threshold ID = 1 mA; VDS = VGS; Tj = 25 °C;
voltage
Fig. 10
ID = 10 mA; VDS = VGS; Tj = 150 °C;
Fig. 11
ID = 1 mA; VDS = VGS; Tj = -55 °C;
Fig. 11
IDSS drain leakage current VDS = 40 V; VGS = 0 V; Tj = 25 °C
VDS = 40 V; VGS = 0 V; Tj = 150 °C
IGSS gate leakage current VGS = 16 V; VDS = 0 V; Tj = 25 °C
VGS = -16 V; VDS = 0 V; Tj = 25 °C
RDSon
drain-source on-state VGS = 4.5 V; ID = 25 A; Tj = 25 °C;
resistance
Fig. 12
VGS = 4.5 V; ID = 25 A; Tj = 150 °C;
Fig. 12; Fig. 13
VGS = 10 V; ID = 25 A; Tj = 25 °C;
Fig. 12
VGS = 10 V; ID = 25 A; Tj = 150 °C;
Fig. 12; Fig. 13
PSMN1R8-40YLC
Product data sheet
All information provided in this document is subject to legal disclaimers.
22 August 2012
Min Typ Max Unit
40 - - V
36 - - V
1.05 1.45 1.95 V
0.5 - - V
- - 2.25 V
- - 1 µA
- - 100 µA
- - 100 nA
- - 100 nA
- 1.8 2.1 mΩ
- - 3.6 mΩ
- 1.5 1.8 mΩ
- - 3.25 mΩ
© NXP B.V. 2012. All rights reserved
5 / 14

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PSMN1R8-40YLC arduino
NXP Semiconductors
PSMN1R8-40YLC
N-channel 40 V 1.8 mΩ logic level MOSFET in LFPAK using NextPower
technology
7. Package outline
Plastic single-ended surface-mounted package (LFPAK; Power-SO8); 4 leads
SOT669
L1
HD
E A A2 C
b2 c2
mounting
base
D1
L2
1 2 34
e b wM A
1/2 e
X
c
E1
b3
b4
A
A1
C
detail X
(A 3)
θ
L
yC
0 2.5 5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT A
A1 A2 A3
b
b2 b3 b4
c
c2
D (1)
D1(1)
max
E(1)
E1(1)
e
H
L L1
mm
1.20
1.01
0.15
0.00
1.10
0.95
0.25
0.50
0.35
4.41
3.62
2.2
2.0
0.9
0.7
0.25
0.19
0.30
0.24
4.10
3.80
4.20
5.0
4.8
3.3
3.1
1.27
6.2
5.8
0.85
0.40
1.3
0.8
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
L2 w y
1.3
0.8
0.25
0.1
θ
OUTLINE
VERSION
IEC
REFERENCES
JEDEC
JEITA
SOT669
MO-235
EUROPEAN
PROJECTION
ISSUE DATE
06-03-16
11-03-25
Fig. 19. Package outline LFPAK; Power-SO8 (SOT669)
PSMN1R8-40YLC
All information provided in this document is subject to legal disclaimers.
Product data sheet
22 August 2012
© NXP B.V. 2012. All rights reserved
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