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Número de pieza | PSMN1R6-40YLC | |
Descripción | MOSFET ( Transistor ) | |
Fabricantes | NXP Semiconductors | |
Logotipo | ||
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No Preview Available ! PSMN1R6-40YLC
N-channel 40 V 1.55 mΩ logic level MOSFET in LFPAK using
NextPower technology
22 August 2012
Product data sheet
1. Product profile
1.1 General description
Logic level enhancement mode N-channel MOSFET in LFPAK package. This product
is designed and qualified for use in a wide range of industrial, communications and
domestic equipment.
1.2 Features and benefits
• High reliability Power SO8 package, qualified to 150°C
• Optimised for 4.5V Gate drive utilising NextPower Superjunction technology
• Ultra low QG, QGD, & QOSS for high system efficiencies at low and high loads
• Ultra low Rdson and low parasitic inductance
1.3 Applications
• DC-to-DC converters
• Load switching
• Power OR-ing
• Server power supplies
• Sync rectifier
1.4 Quick reference data
Table 1. Quick reference data
Symbol
Parameter
Conditions
VDS drain-source voltage 25 °C ≤ Tj ≤ 150 °C
ID
drain current
Tmb = 25 °C; VGS = 10 V; Fig. 1
Ptot total power dissipation Tmb = 25 °C; Fig. 2
Tj junction temperature
Static characteristics
RDSon
drain-source on-state VGS = 4.5 V; ID = 25 A; Tj = 25 °C;
resistance
Fig. 12
VGS = 10 V; ID = 25 A; Tj = 25 °C;
Fig. 12
Dynamic characteristics
QGD
gate-drain charge
VGS = 4.5 V; ID = 25 A; VDS = 20 V;
Fig. 14
Min Typ Max Unit
- - 40 V
[1] - - 100 A
- - 288 W
-55 -
150 °C
- 1.45 1.8 mΩ
- 1.25 1.55 mΩ
- 15.3 - nC
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1 page NXP Semiconductors
PSMN1R6-40YLC
N-channel 40 V 1.55 mΩ logic level MOSFET in LFPAK using
NextPower technology
1
Zth(j-mb)
(K/W)
δ = 0.5
10-1
0.2
0.1
0.05
10-2 0.02
003aag977
P
δ=
tp
T
single shot
tp t
10-3
10-6
10-5
10-4
10-3
10-2
T
10-1
tp (s)
1
Fig. 5. Transient thermal impedance from junction to mounting base as a function of pulse duration
6. Characteristics
Table 6. Characteristics
Symbol
Parameter
Conditions
Static characteristics
V(BR)DSS
drain-source
breakdown voltage
ID = 250 µA; VGS = 0 V; Tj = 25 °C
ID = 250 µA; VGS = 0 V; Tj = -55 °C
VGS(th)
gate-source threshold ID = 1 mA; VDS = VGS; Tj = 25 °C;
voltage
Fig. 10; Fig. 11
ID = 10 mA; VDS = VGS; Tj = 150 °C
ID = 1 mA; VDS = VGS; Tj = -55 °C
IDSS drain leakage current VDS = 40 V; VGS = 0 V; Tj = 25 °C
VDS = 40 V; VGS = 0 V; Tj = 150 °C
IGSS gate leakage current VGS = 16 V; VDS = 0 V; Tj = 25 °C
VGS = -16 V; VDS = 0 V; Tj = 25 °C
RDSon
drain-source on-state VGS = 4.5 V; ID = 25 A; Tj = 25 °C;
resistance
Fig. 12
VGS = 4.5 V; ID = 25 A; Tj = 150 °C;
Fig. 12; Fig. 13
VGS = 10 V; ID = 25 A; Tj = 25 °C;
Fig. 12
VGS = 10 V; ID = 25 A; Tj = 150 °C;
Fig. 12; Fig. 13
RG
gate resistance
f = 1 MHz
Min Typ Max Unit
40 - - V
36 - - V
1.05 1.46 1.95 V
0.5 - - V
- - 2.25 V
- - 1 µA
- - 100 µA
- - 100 nA
- - 100 nA
- 1.45 1.8 mΩ
- - 3.2 mΩ
- 1.25 1.55 mΩ
- - 2.7 mΩ
- 1.17 2.34 Ω
PSMN1R6-40YLC
Product data sheet
All information provided in this document is subject to legal disclaimers.
22 August 2012
© NXP B.V. 2012. All rights reserved
5 / 14
5 Page NXP Semiconductors
PSMN1R6-40YLC
N-channel 40 V 1.55 mΩ logic level MOSFET in LFPAK using
NextPower technology
7. Package outline
Plastic single-ended surface-mounted package (LFPAK); 4 leads
SOT1023
E AA
b1 c1
E1
b2
(3x)
D
H
mounting
base
D1
L
1234
e b wA
X
c
A1 C
θ
detail X Lp y C
Dimensions
0 2.5 5 mm
scale
Unit A A1 b b1 b2 c c1 D(1) D1(1) E(1) E1(1) e H
max 1.10 0.15 0.50 4.41
0.25 0.30 4.70 4.45 5.30 3.7
6.2
mm nom
0.85
1.27
min 0.95 0.00 0.35 3.62
0.19 0.24 4.45
4.95 3.5
5.9
Note
1. Plastic or metal protrusions of 0.15 mm per side are not included.
Outline
References
version
IEC
JEDEC
JEITA
L Lp w y
1.3 0.85
0.25 0.1
0.8 0.40
European
projection
SOT1023
θ
8°
0°
Fig. 19. Package outline LFPAK; Power-SO8 (SOT1023)
sot1023_po
Issue date
09-05-26
11-12-09
PSMN1R6-40YLC
Product data sheet
All information provided in this document is subject to legal disclaimers.
22 August 2012
© NXP B.V. 2012. All rights reserved
11 / 14
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