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PDF PSMN017-30LL Data sheet ( Hoja de datos )
| Número de pieza | PSMN017-30LL | |
| Descripción | MOSFET ( Transistor ) | |
| Fabricantes | NXP Semiconductors | |
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PSMN017-30LL
N-channel DFN3333-8 30 V 17 mΩ logic level MOSFET
Rev. 4 — 12 December 2011
Product data sheet
1. Product profile
1.1 General description
Logic level N-channel MOSFET in DFN3333-8 package qualified to 150 °C. This product
is designed and qualified for use in a wide range of industrial, communications and power
supply equipment.
1.2 Features and benefits
High efficiency due to low switching
and conduction losses
Small footprint for compact designs
Suitable for logic level gate drive
sources
1.3 Applications
Battery protection
DC-to-DC converters
Load switching
Power ORing
1.4 Quick reference data
Table 1.
Symbol
VDS
ID
Quick reference data
Parameter
drain-source voltage
drain current
Ptot total power dissipation
Tj junction temperature
Static characteristics
RDSon
drain-source on-state resistance
Conditions
Tj ≥ 25 °C; Tj ≤ 150 °C
Tmb = 25 °C; VGS = 10 V;
see Figure 1
Tmb = 25 °C; see Figure 2
VGS = 4.5 V; ID = 5 A; Tj = 25 °C;
see Figure 12
VGS = 10 V; ID = 5 A; Tj = 100 °C;
see Figure 13
VGS = 10 V; ID = 5 A; Tj = 25 °C;
see Figure 12
Min Typ Max Unit
- - 30 V
- - 15 A
--
-55 -
37 W
150 °C
-
20.5 25
mΩ
- - 23.4 mΩ
- 15 17 mΩ
1 page  
NXP Semiconductors
PSMN017-30LL
N-channel DFN3333-8 30 V 17 mΩ logic level MOSFET
5. Thermal characteristics
Table 5.
Symbol
Rth(j-mb)
Rth(j-a)
Thermal characteristics
Parameter
thermal resistance from junction to mounting base
thermal resistance from junction to ambient
Conditions
see Figure 4
Min Typ Max Unit
- 3.6 8.4 K/W
[1] -
57 60 K/W
[1] Rth(j-a) is guaranteed by design and assumes that the device is mounted on a 40mm x 40mm x 70µm copper pad at 20°C ambient
temperature. In practice Rth(j-a) will be determined by the customer’s PCB characteristics
003aae259
10
Zth(j-mb)
(K/W)
δ = 0.5
1
0.2
0.1
0.05
10-1 0.02
single shot
P δ = tp
T
10-2
10-6
10-5
10-4
10-3
10-2
tp
T
t
10-1 1
tp (s )
Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration; typical
values
PSMN017-30LL
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 12 December 2011
© NXP B.V. 2011. All rights reserved.
5 of 15
5 Page 
NXP Semiconductors
PSMN017-30LL
N-channel DFN3333-8 30 V 17 mΩ logic level MOSFET
7. Package outline
DFN3333-8: plastic thermal enhanced very thin small outline package; no leads;
8 terminals; body 3.3 x 3.3 x 1.0 mm
SOT873-1
X
D BA
terminal 1
index area
E A A1
detail X
c
terminal 1
index area
e1
e
1
b vMCAB
wM C
4
L1
y1 C
C
y
Eh
L2
85
Dh
DIMENSIONS (mm are the original dimensions)
0 1 2 mm
scale
UNIT
A
max.
A1
b
c
D Dh E Eh e e1 L1 L2 v
w
y y1
mm
1
0.05 0.45
0.00 0.25
0.2
3.4
3.2
2.4
2.2
3.4
3.2
1.80
1.58
0.65
1.95
0.55
0.45
0.52
0.35
0.1 0.05 0.1
0.1
OUTLINE
VERSION
SOT873-1
IEC
---
REFERENCES
JEDEC
JEITA
--- ---
EUROPEAN
PROJECTION
ISSUE DATE
10-04-19
11-12-01
Fig 18. Package outline SOT873-1 (DFN3333-8)
PSMN017-30LL
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 12 December 2011
© NXP B.V. 2011. All rights reserved.
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