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PDF PSMN017-30EL Data sheet ( Hoja de datos )
| Número de pieza | PSMN017-30EL | |
| Descripción | MOSFET ( Transistor ) | |
| Fabricantes | NXP Semiconductors | |
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PSMN017-30EL
N-channel 30 V 17 mΩ logic level MOSFET in I2PAK
Rev. 2 — 3 April 2012
Product data sheet
1. Product profile
1.1 General description
Logic level N-channel MOSFET in I2PAK package qualified to 175 °C. This product is
designed and qualified for use in a wide range of industrial, communications and domestic
equipment.
1.2 Features and benefits
High efficiency due to low switching
and conduction losses
Suitable for logic level gate drive
sources
1.3 Applications
DC-to-DC converters
Load switching
Motor control
Server power supplies
1.4 Quick reference data
Table 1. Quick reference data
Symbol
VDS
ID
Parameter
drain-source voltage
drain current
Conditions
Tj ≥ 25 °C; Tj ≤ 175 °C
Tmb = 25 °C; VGS = 10 V;
see Figure 1
Min
-
[1] -
Ptot total power dissipation
Tj junction temperature
Static characteristics
Tmb = 25 °C; see Figure 2
-
-55
RDSon
drain-source on-state resistance VGS = 4.5 V; ID = 10 A; Tj = 25 °C;
see Figure 13
-
VGS = 10 V; ID = 10 A; Tj = 25 °C;
see Figure 13
-
Dynamic characteristics
QGD gate-drain charge
QG(tot)
total gate charge
Avalanche ruggedness
VGS = 4.5 V; ID = 10 A; VDS = 15 V;
see Figure 14; see Figure 15
-
-
EDS(AL)S
non-repetitive drain-source
avalanche energy
VGS = 10 V; Tj(init) = 25 °C; ID = 32 A;
Vsup ≤ 30 V; RGS = 50 Ω; unclamped
-
[1] Continuous current is limited by package.
Typ Max Unit
- 30 V
- 32 A
- 47 W
- 175 °C
18.7 23.4 mΩ
13.4 17
mΩ
1.94 -
5.1 -
nC
nC
- 13 mJ
1 page  
NXP Semiconductors
PSMN017-30EL
N-channel 30 V 17 mΩ logic level MOSFET in I2PAK
6. Characteristics
Table 6. Characteristics
Symbol
Parameter
Static characteristics
V(BR)DSS
drain-source breakdown
voltage
VGS(th)
gate-source threshold voltage
IDSS
IGSS
RDSon
drain leakage current
gate leakage current
drain-source on-state
resistance
RG gate resistance
Dynamic characteristics
QG(tot)
total gate charge
QGS
QGS(th)
QGS(th-pl)
QGD
VGS(pl)
Ciss
Coss
Crss
gate-source charge
pre-threshold gate-source
charge
post-threshold gate-source
charge
gate-drain charge
gate-source plateau voltage
input capacitance
output capacitance
reverse transfer capacitance
Conditions
ID = 250 µA; VGS = 0 V; Tj = 25 °C
ID = 250 µA; VGS = 0 V; Tj = -55 °C
ID = 1 mA; VDS = VGS; Tj = 25 °C;
see Figure 10; see Figure 11
ID = 1 mA; VDS = VGS; Tj = 175 °C;
see Figure 11
ID = 1 mA; VDS = VGS; Tj = -55 °C
VDS = 30 V; VGS = 0 V; Tj = 25 °C
VDS = 30 V; VGS = 0 V; Tj = 125 °C
VGS = 16 V; VDS = 0 V; Tj = 25 °C
VGS = -16 V; VDS = 0 V; Tj = 25 °C
VGS = 4.5 V; ID = 10 A; Tj = 175 °C;
see Figure 12
VGS = 4.5 V; ID = 10 A; Tj = 25 °C;
see Figure 13
VGS = 10 V; ID = 10 A; Tj = 175 °C;
see Figure 12
VGS = 10 V; ID = 10 A; Tj = 100 °C;
see Figure 12
VGS = 10 V; ID = 10 A; Tj = 25 °C;
see Figure 13
f = 1 MHz
ID = 10 A; VDS = 15 V; VGS = 10 V;
see Figure 14; see Figure 15
ID = 0 A; VDS = 0 V; VGS = 10 V;
see Figure 14; see Figure 15
ID = 10 A; VDS = 15 V; VGS = 4.5 V;
see Figure 14; see Figure 15
ID = 10 A; VDS = 15 V; see Figure 14;
see Figure 15
VDS = 15 V; VGS = 0 V; f = 1 MHz;
Tj = 25 °C; see Figure 16
Min Typ Max Unit
30 - - V
27 - - V
1.3 1.7 2.15 V
0.5 - - V
- - 2.45 V
-
0.3 1
µA
- - 50 µA
- 10 100 nA
- 10 100 nA
- - 43.2 mΩ
- 18.7 23.4 mΩ
- 24 31.5 mΩ
- - 23.5 mΩ
-
13.4 17
mΩ
- 2.03 - Ω
- 10.7 - nC
- 9.55 - nC
- 5.1 - nC
- 1.52 - nC
- 1 - nC
- 0.5 - nC
- 1.94 - nC
- 2.86 - V
- 552 - pF
- 127 - pF
- 64 - pF
PSMN017-30EL
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 3 April 2012
© NXP B.V. 2012. All rights reserved.
5 of 14
5 Page 
NXP Semiconductors
PSMN017-30EL
N-channel 30 V 17 mΩ logic level MOSFET in I2PAK
8. Revision history
Table 7. Revision history
Document ID
Release date
Data sheet status
PSMN017-30EL v.2
Modifications:
20120403
Product data sheet
• Status changed from objective to product.
• Various changes to content.
PSMN017-30EL v.1 20120228
Objective data sheet
Change notice
-
-
Supersedes
PSMN017-30EL v.1
-
PSMN017-30EL
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 3 April 2012
© NXP B.V. 2012. All rights reserved.
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