|
|
PDF HD404618 Data sheet ( Hoja de datos )
| Número de pieza | HD404618 | |
| Descripción | 4-Bit Single-Chip Microcomputer | |
| Fabricantes | Hitachi Semiconductor | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de HD404618 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
|
No Preview Available !
HD404618 Series
4-Bit Single-Chip Microcomputer
Rev. 6.0
Sept. 1998
Description
The HD404618 Series is designed with the powerful and efficient architecture of the HMCS400 family.
The MCU incorporates a high-precision dual-tone multifrequency (DTMF) circuit, LCD driver/controller,
voltage comparator, and 32-kHz watch oscillator circuit.
The HD404618 Series includes five chips: the HD404612 with 2-kword ROM; the HD404614 with 4-
kword ROM; the HD404616 with 6-kword ROM; the HD404618 with 8-kword ROM; the HD4074618
with 8-kword PROM.
The HD4074618, incorporating PROM, is a ZTAT™ microcomputer that can dramatically shorten system
development periods and smooth the process from debugging to mass production.
ZTAT™ : Zero Turn Around time ZTAT is a trademark of Hitachi Ltd.
Features
• 2048-word × 10-bit ROM (HD404612)
• 4096-word × 10-bit ROM (HD404614)
• 6144-word × 10-bit ROM (HD404616)
• 8192-word × 10-bit ROM (HD404618, HD4074618)
• 1184-digit × 4-bit RAM
• 30 I/O pins
10 high-current output pins
CMOS I/O pin circuit configuration
Input/output pull-up MOS can be selected by software
• On-chip DTMF generator
• LCD controller/driver (32 segments × 4 commons)
• Three timer/counters
• Clock-synchronous 8-bit serial interface
• Six interrupt sources
Two by external sources
Four by internal sources
1 page  
Pin Number
Pin Number
FP-80B
FP-80A,
TFP-80
Pin Name I/O FP-80B
65 63
COM1
O 73
66 64
COM2
O 74
67 65
COM3
O 75
68 66
COM4
O 76
69 67
70 68
71 69
72 70
V1
V2
V3
TONEC
77
78
79
O 80
Note: I/O: Input/output pin, I: Input pin, O: Output pin
FP-80A,
TFP-80
71
72
73
74
75
76
77
78
HD404618 Series
Pin Name
TONER
VT ref
VCC
OSC1
OSC2
RESET
D0
D1
I/O
O
I
O
I
I/O
I/O
Pin Functions
Power Supply
VCC: Apply power voltage to this pin.
GND: Connect to ground.
TEST: Used for test purposes only. Connect it to VCC.
RESET: Resets the MCU.
Oscillators
OSC1, OSC2: Used as pins for the internal oscillator circuit. They can be connected to a ceramic
resonator, or OSC1 can be connected to an external oscillator circuit.
X1, X2: Used for a 32.768-kHz crystal oscillator that acts as a clock.
Ports
D0–D13 (D Port): Input/output port addressable by individual bits. D0–D9 are I/O pins and D10–D13 are
input pins. D0–D9 are high current output pins (15 mA, max.). D11–D13 are also available as voltage
comparators.
R0–R3 (R Ports): Input/output ports addressable in 4-bit units. R00, R01, R02, R31, R32, and R33, are
multiplexed with SCK, SI, SO, TIMO, INT0, and INT1, respectively.
5
5 Page 
HD404618 Series
Bit 3
IM0
0 (IM of INT0 )
IMTA
1 (IM of timer A)
2
IMTC
(IM of timer C)
3 Not used
Bit 2
IF0
(IF of INT0 )
IFTA
(IF of timer A)
IFTC
(IF of timer C)
Not used
Bit 1
RSP
(Reset SP bit)
IM1
(IM of INT1 )
IMTB
(IM of timer B)
IMS
(IM of serial)
Bit 0
IE
(Interrupt enable flag) $000
IF1
(IF of INT1 )
IFTB
(IF of timer B)
$001
$002
IFS
(IF of serial)
$003
32
DTON
Direct transfer on flag
TGSP
(Tone generator
speed flag)
WDON
(Watchdog on flag)
LSON
(Low speed on flag)
$020
$021
Not Used
35 $023
IF: Interrupt request flag
IM: Interrupt mask
IE: Interrupt enable flag
SP: Stack pointer
Note: Bits in the interrupt control bits area and register flag area are set by the SEM or SEMD
instruction, reset by the REM or REMD instruction, and tested by the TM or TMD instruction.
Other instructions have no effect.
Figure 3 Configuration of Interrupt Control Bits and Register Flag Areas
IF
RSP
WDON
TGSP
DTON
SEM/SEMD
Not executed
Not executed
Allowed
Allowed
Not executed in active mode
Used in subactive mode
REM/REMD
Allowed
Allowed
Not executed
Allowed
Allowed
TM/TMD
Allowed
Inhibited
Inhibited
Inhibited
Allowed
Note: WDON is always reset in active mode.
DTON is always reset in active mode.
If the TM or TMD instruction is executed for the inhibited bits or non-existing bits,
the value in ST becomes invalid.
Figure 4 Usage Limitations of RAM Bit Manipulation Instructions
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet HD404618.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| HD404612 | 4-Bit Single-Chip Microcomputer | Hitachi Semiconductor |
| HD404612FS | 4-Bit Single-Chip Microcomputer | Hitachi Semiconductor |
| HD404612H | 4-Bit Single-Chip Microcomputer | Hitachi Semiconductor |
| HD404612TF | 4-Bit Single-Chip Microcomputer | Hitachi Semiconductor |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |