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PDF SPCA533A Data sheet ( Hoja de datos )
| Número de pieza | SPCA533A | |
| Descripción | DIGITAL STILL CAMERA CONTROLLER | |
| Fabricantes | Sunplus | |
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Preliminary
SPCA533A
User Guide
DIGITAL STILL CAMERA CONTROLLER
Sunplus Camera Solution
SPCA533A
User Guide
Version 0.2.0
June 14, 2002
is a trade mark of Sunplus.
SUNPLUS TECHNOLOGY CO. reserves the right to change this documentation without prior notice. Information provided by SUNPLUS TECHNOLOGY CO.
is believed to be accurate and reliable. However, SUNPLUS TECHNOLOGY CO. makes no warranty for any errors which may appear in this document.
Contact SUNPLUS TECHNOLOGY CO. to obtain the latest version of device specifications before placing your order. No responsibility is assumed by
SUNPLUS TECHNOLOGY CO. for any infringement of patent or other rights of third parties which may result from its use. In addition, SUNPLUS products
are not authorized for use as critical components in life support devices/ systems or aviation devices/systems, where a malfunction or failure of the product
may reasonably be expected to result in significant injury to the user, without the express written approval of Sunplus.
PAGE 1
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1 page  
Preliminary
User Guide
SPCA533A
1. Operational Descriptions
1.1 Operation modes
The main operation modes of the SPCA533A are preview, capture, videoclip and playback modes. These modes are mutually exclusive.
The SPCA533A can only operated in one of these modes at a time. There are many tasks that can be excuted concurrently with these
modes. For example, data transfer between the PC and the camera can take place while the camera is in any of these operation modes.
Also, data transfer between the camera and the storage media can also be performed while the SPCA533A is operated in any operation
modes. These concurrence operations are useful when the application need to put the time-consuming tasks to the background execution.
1.1.1 Preview mode
In the preview mode, the SPCA533A receives raw image data from the sensor. It processes the data in real time with the CDSP (Color
DSP) and stores the data in the frame buffer of the SDRAM. Then, the data is read from the SDRAM and sent to the display device. The
SPCA533A supports TFT LCD panels, STN LCD panels, digital TV output and analog TV output. The following diagram demonstrates the
data flow in the preview mode.
The sensor’s fame rate are normally adjusted to 30 fps in the preview mode. For the CCD sensors, the user need to adjust the
parameters in the built-in timing generator to make the SPCA533A drive out 30 fps timing. For the CMOS sensors, the frame rate may be
dominated by the SPCA533A or by the sensors, depending on the operation mode of the CMOS sensors. If the CMOS sensors is operated
in the master mode, the SPCA533A programs the internal registers of the sensors to control the timing. On the other hand, if CMOS sensors
is operated is operated in the slave mode, the users need to adjust the parameters in the CMOS interface controller of the SPCA533A to
control the frame rate. Mega-pixel sensors usually supports monitor mode (CCD) or decimation mode (CMOS) to allow the pixel data to be
read at 30 fps frame rate.
The SPCA533A provides many programmable parameters in the CDSP to achieve the best image quality. The image is horizontally
scaled-down by the CDSP, too. The horizontal scaling-down function in the DSP not only reduces the bandwidth requirement of the SDRAM
but also maintain the appropriate aspect ratio of the image in a CCD system. For example, if the a CCD sensor vertically subsampled the
image by 4, then the CDSP will need to scale down the image horizontally by 4 to maintain the correct aspect ratio. After color processing,
the CDSP convert the image data from the RGB domain to the YUV domain. The AE (auto-exposure) and AWB (auto-white balance
firmware) algorithm is executed at the background in the preview mode. The CDSP provides statistics on the image data for the AE/AWB
algorithm’s reference.
The data stored in the SDRAM is in YUV422 format. The SDRAM controller maintains two frame buffers to convert the frame rate if the
sensor’s frame rate is different from the frame rate of the display device.
To fit a wide range of the resolutions of the display devices, The LCD/TV interface controller has built-in scaling function. The scaling
ratio of the LCD/TV scaling function can be adjusted independently in the vertical direction and the horizontal direction. However, it is
important to maintain the appropriate aspect ratio of the original image. For TV output, the PAL frame rate fixed at 25 fps, the NTSC is 30fps.
The frame rates of the LCD panels are usually fiexed by the panel makers.
1.1.2 Capture mode
The capture mode allows the user to capture image output from the sensors. Depending on the setting of the camera, the SPCA533A is
able to capture a single image, multiple images and video. The simplest flow is the single image capture. The following diagram shows the
data flow of snapping a single image.
© Sunplus Technology Co., Ltd.
Proprietary & Confidential
PAGE 5
Jun. 14, 2001
Preliminary Version: 0.2.0
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Preliminary
User Guide
SPCA533A
6. Audio initialization:
a) Set the audio buffer mode (register 0x2605)
b) Set the audio data format (register 0x2606)
c) Enable the AC’97 codec or the embedded codec
7. CPU initialization
a) enable 0x0000 – 0x0fff 4K SRAM (register 0x2C00[0])
b) enable 0x1000 – 0x1fff 4K SRAM (register 0x2C00[1])
c) enable banking of the ROM space RompageEn (register 0x2C00[3])
d) enable RAM space to ROM space mapping via RampageEn (register 0x2C00[2])
e) Port 1 output enable mode selection via P1oesel[7:0] (register 0x2C02), SFR 8’h90 and 0x201A[4].
f) Port 3 output enable mode selection via P3oesel[5:0] (register 0x2C03) and SFR 8’hB0
8. TV/LCD interface initialization:
a) Set the display mode (register 0X2D00)
b) Set vertical line count per frame (register 0X2D02~0X2D03)
c) Set horizontal pixel count per line (register 0X2D04~0X2D05)
d) Set vertical sync width (register 0X2D06)
e) Set horizontal sync width (register 0X2D07)
f) Set active region for display (register 0X2D08~0X2D08)
g) Turn on the TV/LCD encoder function (register 0X2001)
9. Other initialization tasks:
a) The font-base OSD must be upload to the SDRAM
b) The graphic-based OSD must be upload to the SDRAM and decompressed
c) The FAT of the storage media must be uploaded to the SDRAM. It is much faster to operate the FAT in the SDRAM(with the
DMA to SRAM function) than from the storage media directly.
d) The audio sound library (if any) must be uploaded to the SDRAM.
e) The EXIF file header (if any) must be uploaded to the SDRAM for later use.
1.2.3 Suspend/resume control
To put the system into suspend state, the CPU must set the “swsuspend” control bit in the global control register section. When the
camera is connected to the PC, the CPU should program the “swsuspend” bit after it received an USB suspend interrupt. When the camera
is not connected to the PC, the CPU itself should setup a timer to put the system into suspend state within a reasonable period of time. Both
the timer in the built-in 8032 and the timer in the global module can be used to perform the time counting.
In the suspend state, the crystal pads of the SPCA533A is disabled. All the internal clocks are stopped. The firmware should put all the
IO pins into low (or high) state to prevent current leakage causing by interfacing to the external modules. The following table shows the ideal
state of each pin in typical applications.
CPU interface (note 1)
Psen
HW driving low
Ale HW driving high
P0[7:0]
Next instruction address
P1[7:0]
FW programmable
P2[7:0]
Next instruction address
P3[7:0]
FW programmable
Storage media Interface (Note 3)
Fmgpio[29:0] Driving Low/Driving high/Floating
SDRAM interface (Note 2)
SDRAM power cut-off (Set register 0x2708 to high)
© Sunplus Technology Co., Ltd.
Proprietary & Confidential
PAGE 11
SDRAM is used as storage media and in self-refresh state
Jun. 14, 2001
Preliminary Version: 0.2.0
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