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What is MAX191?

This electronic component, produced by the manufacturer "Maxim Integrated", performs the same function as "12-Bit Sampling ADC".


MAX191 Datasheet PDF - Maxim Integrated

Part Number MAX191
Description 12-Bit Sampling ADC
Manufacturers Maxim Integrated 
Logo Maxim Integrated Logo 


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19-4506; Rev 4; 2/97
EVFAOLLULAOTWIOSNDKAITTAMSAHNEUEATL
Low-Power, 12-Bit Sampling ADC
with Internal Reference and Power-Down
General Description
The MAX191 is a monolithic, CMOS, 12-bit analog-to-
digital converter (ADC) featuring differential inputs,
track/hold (T/H), internal voltage reference, internal or
external clock, and parallel or serial µP interface. The
MAX191 has a 7.5µs conversion time, a 2µs acquisition
time, and a guaranteed 100ksps sample rate.
The MAX191 operates from a single +5V supply or from
dual ±5V supplies, allowing ground-referenced bipolar
input signals. The device features a logic power-down
input, which reduces the 3mA VDD supply current to
50µA max, including the internal-reference current.
Decoupling capacitors are the only external compo-
nents needed for the power supply and reference. This
ADC operates with either an external reference, or an
internal reference that features an adjustment input for
trimming system gain errors.
The MAX191 provides three interface modes: two 8-bit
parallel modes, and a serial interface mode that is com-
patible with SPITM, QSPITM, and MICROWIRETM serial-
interface standards.
________________________Applications
Battery-Powered Data Logging
PC Pen Digitizers
High-Accuracy Process Control
Electromechanical Systems
Data-Acquisition Boards for PCs
Automatic Testing Systems
Telecommunications
Digital Signal Processing (DSP)
Functional Diagram
VREF 5
REFADJ 6
VDD
24
2.46V
REF
AIN + 3
AIN - 4
MAX191
7 12
AGND DGND
CLK/SCLK
23
OSC 3-STATE
OUTPUT
8-BIT
BUS
AND
12 SERIAL
I/O
IN REF OUT
12-BIT
SAR ADC
2
VSS
CONTROL
LOGIC
1 22 8
PD PAR BIP
18 D7/DOUT
17
16 D6/SCLKOUT
D5/SSTRB
15
D4
14 D3/D11
13 D2/D10
11
D1/D9
10 D0/D8
20 CS
19
9
21
RD
BUSY
HBEN
____________________________Features
o 12-Bit Resolution, 1/2LSB Linearity
o +5V or ±5V Operation
o Built-In Track/Hold
o Internal Reference with Adjustment Capability
o Low Power: 3mA Operating Mode
20µA Power-Down Mode
o 100ksps Tested Sampling Rate
o Serial and 8-Bit Parallel µP Interface
o 24-Pin Narrow DIP and Wide SO Packages
Ordering Information
PART
TEMP. RANGE
PIN-PACKAGE
ERROR
(LSB)
MAX191ACNG 0°C to +70°C 24 Narrow Plastic DIP ±1/2
MAX191BCNG 0°C to +70°C 24 Narrow Plastic DIP ±1
MAX191ACWG 0°C to +70°C 24 Wide SO
±1/2
MAX191BCWG 0°C to +70°C 24 Wide SO
±1
MAX191BC/D
0°C to +70°C Dice*
±1
MAX191AENG -40°C to +85°C 24 Narrow Plastic DIP ±1/2
MAX191BENG -40°C to +85°C 24 Narrow Plastic DIP ±1
MAX191AEWG -40°C to +85°C 24 Wide SO
±1/2
MAX191BEWG -40°C to +85°C 24 Wide SO
±1
MAX191AMRG -55°C to +125°C 24 Narrow CERDIP** ±1/2
MAX191BMRG -55°C to +125°C 24 Narrow CERDIP** ±1
* Dice are specified at TA = +25°C, DC parameters only.
** Contact factory for availability and processing to MIL-STD-883.
Pin Configuration
TOP VIEW
PD 1
VSS 2
AIN+ 3
AIN- 4
VREF 5
REFADJ 6
AGND 7
BIP 8
BUSY 9
D0/D8 10
D1/D9 11
DGND 12
MAX191
24 VDD
23 CLK/SCLK
22 PAR
21 HBEN
20 CS
19 RD
18 D7/DOUT
17 D6/SCLKOUT
16 D5/SSTRB
15 D4
14 D3/D11
13 D2/D10
DIP/SO
SPI and QSPI are trademarks of Motorola, Inc. MICROWIRE is a trademark of National Semiconductor Corp.
________________________________________________________________ Maxim Integrated Products 1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800.
For small orders, phone 408-737-7600 ext. 3468.
http://www.Datasheet4U.com

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MAX191 equivalent
Low-Power, 12-Bit Sampling ADC
with Internal Reference and Power-Down
TIMING CHARACTERISTICS (Figures 6–10) (continued)
(VDD =5V ±5%, VSS = 0V or -5V ±5%, TA = TMIN to TMAX, unless otherwise noted.) (Note 14)
PARAMETER
CS or RD Hold Time
CS or RD Setup Time
CS to DOUT Three-State
SCLK to SCLKOUT Delay
SCLKOUT to DOUT Delay
SCLK to DOUT Delay
SCLK to SSTRB Delay
SYMBOL CONDITIONS
t16
t17
t19
t20
t21
t22
t23
TA = +25°C
MIN TYP MAX
10
150
100
160
100
240
260
MAX191C/E
MIN TYP MAX
10
150
110
180
130
260
310
MAX191M
MIN TYP MAX
10
150
120
200
150
280
350
UNITS
ns
ns
ns
ns
ns
ns
ns
Note 1: Performance at power-supply tolerance limits guaranteed by power-supply rejection test.
Note 2: VDD = 5V, VSS = 0V, FS = VREF.
Note 3: FS = VREF, offset nulled, ideal last-code transition = FS - 3/2 LSB.
Note 4: Gain-Error Tempco = GE is the gain-error change from TA = +25°C to TMIN or TMAX.
Note 5: Conversion time defined as the number of clock cycles times the clock period; clock has a 50% duty cycle.
Note 6: Guaranteed by design, not production tested.
Note 7: AIN+, AIN- must not exceed supplies for specified accuracy.
Note 8: VREF TC = T, where VREF is reference-voltage change from TA = +25°C to TMIN or TMAX.
Note 9: Output current should not change during conversion. This current is in addition to the current required by the internal DAC.
Note 10: REFADJ adjustment range is defined as the allowed voltage excursion on REFADJ relative to its unadjusted value of 2.4V.
This will typically result in a 1.7 times larger change in the REF output (Figure 19a).
Note 11: This current is included in the PD supply current specification.
Note 12: Floating the PD pin guarantees external compensation mode.
Note 13: VREF = 4.096V, external reference.
Note 14: All input control signals are specified with tr = tf = 5ns (10% to 90% of 5V) and timed from a voltage level of 1.6V.
Note 15: t3 and t6 are measured with the load circuits of Figure 1 and defined as the time required for an output to cross 0.8V or 2.4V.
Note 16: t7 is defined as the time required for the data lines to change 0.5V when loaded with the circuits of Figure 2.
_______________________________________________________________________________________ 5
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