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PDF MX25V2006E Data sheet ( Hoja de datos )
| Número de pieza | MX25V2006E | |
| Descripción | 2M-BIT [x 1/x 2] CMOS SERIAL FLASH | |
| Fabricantes | MACRONIX | |
| Logotipo |  |
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MX25V2006E
MX25V2006E
DATASHEET
P/N: PM1709
REV. 1.3, DEC. 09, 2013
1
http://www.Datasheet4U.com
1 page  
MX25V2006E
GENERAL DESCRIPTION
The device features a serial peripheral interface and software protocol allowing operation on a simple 3-wire bus.
The four bus signals are a clock input (SCLK), a serial data input (SI), a serial data output (SO), and a chip select (CS#).
Serial access to the device is enabled by CS# input.
When it is in Dual Output read mode, the SI and SO pins become SIO0 and SIO1 pins for data output.
The device provides sequential read operation on whole chip.
After program/erase command is issued, auto program/erase algorithms which program/erase and verify the speci-
fied page or sector/block locations will be executed. Program command is executed on byte basis, or page basis, or
word basis for erase command is executes on sector, or block, or whole chip basis.
To provide user with ease of interface, a status register is included to indicate the status of the chip. The status read
command can be issued to detect completion status of a program or erase operation via WIP bit.
When the device is not in operation and CS# is high, it is put in standby mode.
The device utilizes Macronix's proprietary memory cell, which reliably stores memory contents even after 100,000
program and erase cycles.
PIN CONFIGURATIONS
8-PIN SOP (150mil)
CS#
SO/SIO1
WP#
GND
1
2
3
4
8 VCC
7 HOLD#
6 SCLK
5 SI/SIO0
8-LAND, WSON (6x5mm)
CS#
SO/SIO1
WP#
GND
1
2
3
4
8 VCC
7 HOLD#
6 SCLK
5 SI/SIO0
PIN DESCRIPTION
SYMBOL DESCRIPTION
CS# Chip Select
SI/SIO0
Serial Data Input (for 1 x I/O) / Serial Data
Input & Output (for Dual Output mode)
SO/SIO1
Serial Data Output (for 1 x I/O) / Serial
Data Output (for Dual Output mode)
SCLK Clock Input
WP# Write Protection
HOLD#
Hold, to pause the device without
deselecting the device
VCC + 2.5V Power Supply
GND Ground
P/N: PM1709
REV. 1.3, DEC. 09, 2013
5
http://www.Datasheet4U.com
5 Page 
MX25V2006E
Table 3. COMMAND DEFINITION
COMMAND
(byte)
WREN
(write
Enable)
WRDI
(write disable)
WRSR
(write status
register)
RDID
RDSR
(read
(read status
identification) register)
READ
(read data)
Fast Read
(fast read
data)
1st
2nd
3rd
4th
5th
Action
06 Hex
sets the
(WEL) write
enable latch
bit
04 Hex
01 Hex
9F Hex
reset the to write new output the
(WEL) write status register manufacturer
enable latch
ID and 2-byte
bit device ID
05 Hex
to read out
the status
register
03 Hex
0B Hex
AD1 AD1
AD2 AD2
AD3 AD3
Dummy
n bytes read n bytes read
out until CS# out until CS#
goes high goes high
COMMAND
(byte)
RDSFDP
(Read SFDP)
RES (Read
Electronic ID)
REMS (Read
Electronic
Manufacturer
& Device ID)
DREAD (Dual
Output Mode
command)
SE
(Sector
Erase)
BE CE
(Block Erase) (Chip Erase)
1st
5A Hex
AB Hex
90 Hex
3B Hex
20 Hex 52 or D8 Hex 60 or C7 Hex
2nd AD1
x
x AD1 AD1 AD1
3rd AD2
x
x AD2 AD2 AD2
4th AD3
x
ADD(1)
AD3
AD3
AD3
5th Dummy
Dummy
Read SFDP to read out Output the n bytes read to erase the to erase the to erase
mode 1-byte Device manufacturer out by Dual selected
selected whole chip
Action
ID
ID and device Output until
sector
block
ID CS# goes
high
COMMAND
(byte)
PP
(Page
Program)
DP (Deep
Power Down)
RDP (Release
from Deep
Power-down)
1st
02 Hex
B9 Hex
AB Hex
2nd AD1
3rd AD2
4th AD3
5th
to program enters deep release from
Action
the selected power down deep power
page
mode
down mode
(1) ADD=00H will output the manufacturer's ID first and ADD=01H will output device ID first.
(2) It is not recommended to adopt any other code which is not in the above command definition table.
P/N: PM1709
11
REV. 1.3, DEC. 09, 2013
http://www.Datasheet4U.com
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet MX25V2006E.PDF ] | |
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