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What is MAX4552?

This electronic component, produced by the manufacturer "Maxim Integrated", performs the same function as "SPST Analog Switches".


MAX4552 Datasheet PDF - Maxim Integrated

Part Number MAX4552
Description SPST Analog Switches
Manufacturers Maxim Integrated 
Logo Maxim Integrated Logo 


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19-1391; Rev 0; 10/98
±15kV ESD-Protected, Quad,
Low-Voltage, SPST Analog Switches
General Description
The MAX4551/MAX4552/MAX4553 are quad, low-volt-
age, single-pole/single-throw (SPST) analog switches.
Each switch is protected against ±15kV electrostatic
discharge (ESD) shocks, without latchup or damage.
On-resistance (100max) is matched between switch-
es to 4max, and is flat (8max) over the specified
signal range. Each switch can handle Rail-to-Rail® ana-
log signals. The off-leakage current is only 1nA at
+25°C and 10nA at +85°C.
The MAX4551 has four normally closed (NC) switches,
and the MAX4552 has four normally open (NO) switch-
es. The MAX4553 has two NC and two NO switches.
These CMOS switches can operate with dual power
supplies ranging from ±2V to ±6V or a single supply
between +2V and +12V. They are fully specified for sin-
gle +2.7V operation.
All digital inputs have +0.8V and +2.4V logic thresh-
olds, ensuring TTL/CMOS-logic compatibility when
using ±5V or a single +5V supply.
________________________Applications
Battery-Operated Equipment
Data Acquisition
Test Equipment
Avionics
Audio Signal Routing
Networking
____________________________Features
o ±15kV ESD Protection per IEC 1000-4-2
o +2V to +12V Single Supply
±2V to ±6V Dual Supplies
o 120Signal Paths with ±5V Supplies
o Low Power Consumption: <1µW
o 4 Separately Controlled SPST Switches
o Rail-to-Rail Signal Handling
o Pin-Compatible with Industry-Standard
DG211/DG212/DG213
o TTL/CMOS-Compatible Inputs with Dual ±5V or
Single +5V Supply
Ordering Information
PART
TEMP. RANGE PIN-PACKAGE
MAX4551CEE
0°C to +70°C
16 QSOP
MAX4551CSE
0°C to +70°C
16 Narrow SO
MAX4551CPE
0°C to +70°C
16 Plastic DIP
MAX4551C/D
0°C to +70°C
Dice*
MAX4551EEE
-40°C to +85°C
16 QSOP
MAX4551ESE
-40°C to +85°C
16 Narrow SO
MAX4551EPE
-40°C to +85°C
16 Plastic DIP
Ordering Information continued at end of data sheet.
*Contact factory for dice specifications.
Pin Configurations/Functional Diagrams/Truth Tables
TOP VIEW
IN1 1
COM1 2
NC1 3
V- 4
GND 5
NC4 6
COM4 7
IN4 8
MAX4551
16 IN2
15 COM2
14 NC2
13 V+
12 N.C.
11 NC3
10 COM3
9 IN3
QSOP/SO/DIP
MAX4551
LOGIC
SWITCH
0 ON
1 OFF
N.C. = NOT CONNECTED
IN1 1
COM1 2
NO1 3
V- 4
GND 5
MAX4552
16 IN2
15 COM2
14 NO2
13 V+
12 N.C.
NO4 6
COM4 7
11 NO3
10 COM3
IN4 8
9 IN3
QSOP/SO/DIP
MAX4552
LOGIC
SWITCH
0 OFF
1 ON
SWITCHES SHOWN FOR LOGIC "0" INPUT
IN1 1
COM1 2
NO1 3
V- 4
GND 5
NO4 6
COM4 7
MAX4553
16 IN2
15 COM2
14 NC2
13 V+
12 N.C.
11 NC3
10 COM3
IN4 8
9 IN3
QSOP/SO/DIP
LOGIC
MAX4553
SWITCHES
1, 4
SWITCHES
2, 3
0 OFF ON
1 ON OFF
Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd.
________________________________________________________________ Maxim Integrated Products 1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800.
For small orders, phone 1-800-835-8769.
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MAX4552 equivalent
±15kV ESD-Protected, Quad,
Low-Voltage, SPST Analog Switches
ELECTRICAL CHARACTERISTICS—Single +3V Supply
(V+ = +2.7V to +3.6V, V- = 0, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
ANALOG SWITCH
Analog Signal Range
(Note 3)
VCOM_, VNO_,
VNC_
COM_ to NO_, COM_ to NC_
On-Resistance
LOGIC INPUT
IN_ Input Logic Threshold High
IN_ Input Logic Threshold Low
IN_ Input Current Logic High
or Low
RON
V+ = 2.7V, VCOM_ = 1.0V,
ICOM_ = 0.1mA
VIN_H
VIN_L
IINH_, IINL_
VIN_ = 0.8V or 2.4V
SWITCH DYNAMIC CHARACTERISTICS (Note 4)
Turn-On Time
tON
VCOM_ = 1.5V, V+ = 2.7V,
Figure 1
Turn-Off Time
tOFF
VCOM_ = 1.5V, V+ = 2.7V,
Figure 1
Break-Before-Make Time Delay
(MAX4553 Only)
tBBM
VCOM_ = 1.5V, V+ = 3.6V,
Figure 2
TA
MIN
TYP
(Note 2)
MAX UNITS
C, E 0
V+ V
+25°C
C, E
200 400
500
C, E 2.0 1.1
V
C, E 1.1 0.5 V
C, E
-1 0.03
1 µA
+25°C
C, E
+25°C
C, E
+25°C
10
190 350
ns
400
160 250
ns
300
50 ns
Charge Injection
POWER SUPPLY
V+ Supply Current
ESD PROTECTION
On NC_ and NO_ Pins
per IEC 801-2
All Pins
Q
CL = 1nF, VNO_ = 0, RS = 0,
Figure 3
+25°C
1 5 pC
+25°C -1 0.05
1
I+ V+ = 3.6V, all VIN_ = 0 or V+ C, E -1
µA
1
Contact Discharge IEC 1000-4-2
Air Discharge IEC 1000-4-2
Human Body Model
MIL-STD-883C Method 3015
+25°C
+25°C
+25°C
+25°C
±8
±15
±15
±2.5
kV
kV
Note 2:
Note 3:
Note 4:
Note 5:
Note 6:
Note 7:
Note 8:
Note 9:
The algebraic convention is used in this data sheet; the most negative value is shown in the minimum column.
Guaranteed by design.
RON = RON(MAX) - RON(MIN).
Resistance flatness is defined as the difference between the maximum and minimum on-resistance values, as measured
over the specified analog signal range.
Leakage parameters are 100% tested at maximum rated temperature, and guaranteed by correlation at TA = +25°C.
Off-isolation = 20log10 [ VCOM_ / (VNC_ or VNO_) ], VCOM_ = output, VNC_ or VNO_ = input to off switch.
Between any two switches.
Leakage testing for single-supply operation is guaranteed by testing with dual supplies.
_______________________________________________________________________________________ 5
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