74HCT4538 Datasheet PDF - NXP Semiconductors
Part Number | 74HCT4538 | |
Description | Dual retriggerable precision monostable multivibrator | |
Manufacturers | NXP Semiconductors | |
Logo | ||
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Preview 1 page No Preview Available ! 74HC4538; 74HCT4538
Dual retriggerable precision monostable multivibrator
Rev. 4 — 24 February 2016
Product data sheet
1. General description
The 74HC4538; 74HCT4538 is a dual retriggerable-resettable monostable multivibrator.
Each multivibrator has two trigger/retrigger inputs (nA and nB), a direct reset input (nCD),
two complementary outputs (nQ and nQ), and two pins (nREXT/CEXT and nCEXT) for
connecting the external timing components CEXT and REXT. Typical pulse width variation
over temperature range is ± 0.2%. The device may be triggered by either the positive or
the negative edges of the input pulse. The duration and accuracy of the output pulse are
determined by the external timing components CEXT and REXT. The output pulse width (T)
is equal to 0.7 REXT CEXT. The linear design techniques guarantee precise control of
the output pulse width. A LOW level at nCD terminates the output pulse immediately.
Schmitt-trigger action in the trigger inputs makes the circuit highly tolerant to slower rise
and fall times. Inputs include clamp diodes. This enables the use of current limiting
resistors to interface inputs to voltages in excess of VCC.
2. Features and benefits
Tolerant of slow trigger rise and fall times
Separate reset inputs
Triggering from falling or rising edge
Complies with JEDEC standard no. 7A
Input levels:
For 74HC4538: CMOS level
For 74HCT4538: TTL level
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from 40 C to +85 C and from 40 C to +125 C
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NXP Semiconductors
74HC4538; 74HCT4538
Dual retriggerable precision monostable multivibrator
6. Functional description
Table 3.
Inputs
nA
Function table
nB
L
nCD
H
Outputs
nQ
H H
XXL L
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care;
= positive-going transition; = negative-going transition;
= one HIGH level output pulse, with the pule width determined by CEXT and REXT;
= one LOW level output pulse, with the pulse width determined by CEXT and REXT.
nQ
H
Q%LQSXW
Q$LQSXW
Q&'LQSXW
Q5(;7&(;7LQSXW
9UHI
9UHI
Q4RXWSXW
77
(1) Positive edge triggering.
(2) Positive edge re-triggering (pulse lengthening).
(3) Negative edge triggering.
(4) Reset (pulse shortening).
(5) T = 0.7 REXT CEXT (see also Figure 6).
Fig 5. Timing diagram
9UHI
9UHI
7
DDH
74HC_HCT4538
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 24 February 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
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Information | Total 24 Pages | |
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