74LVC161284 Datasheet PDF - ST Microelectronics
| Part Number | 74LVC161284 | |
| Description | LOW VOLTAGE HIGH SPEED IEEE1284 TRANSCEIVER | |
| Manufacturers | ST Microelectronics | |
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74LVC161284
LOW VOLTAGE HIGH SPEED IEEE1284 TRANSCEIVER
s HIGH SPEED: tPD = 9ns (MAX.) at VCC = 3V
s LOW POWER DISSIPATION:
ICC=20µA (MAX) at VCC=3.6V TA=85°C
s TTL COMPATIBLE INPUTS
VIH=2V (MIN) VIL=0.8(MAX)
s OPERATING VOLTAGE RANGE:
VCC(OPR) = 3.0V to 3.6V
s A PORT HAVE STANDARD 4mA TOTEM
POLE OUTPUT
s B PORT HIGH DRIVE SOURCE/SINK
CAPABILITY OF 14mA
s SUPPORT IEEE STD 1284-I (LEVEL 1 TYPE)
AND IEEE STD 1284-II (LEVEL 2 TYPE) FOR
BIDIRECTIONAL PARALLEL
COMMUNICATIONS BETWEEN PERSONAL
COMPUTER ANT PRINTING PERIPHERALS
s TRANSLATION CAPABILITY ALLOW
OUTPUTS ON CABLE SIDE TO INTERFACE
WITH 5V SIGNAL
s PULL-UP RESISTOR INTEGRATED ON ALL
OPEN-DRAIN OUTPUT ELIMINATE THE
NEED FOR DISCRETE RESISTOR
s REPLACE THE FUNCTION OF TWO
74LVC1284 DEVICES
TSSOP
ORDER CODES
PACKAGE
TSSOP
TUBE
PIN CONNECTION
www.DataSheet.co.kr
T&R
74LVC161284TTR
DESCRIPTION
The 74LVC161284 contains eight high speed non
inverting bidirectional buffers and eleven control/
status non-inverting buffers with open drain
outputs fabricated in silicon gate C2MOS
technology. It’s intended to provide a standard
signaling method for a bi-direction parallel
peripheral in an Extended Capabilities Port Mode
(ECP). The HD (Active HIGH) input pin enables
the Cable port to switch from Open Drain to a high
drive totem pole output, capable of sourcing 14mA
on all thirteen buffer and 84mA on PERI LOGIC
OUTPUT buffer. The DIR input determines the
direction of data flow on the bidirectional buffers.
DIR (Active HIGH) enables data flow from A port
to B port. DIR (Active LOW) enables data flow
from B port to A port. It is available in the
commercial temperature range.
May 2003
1/11
Datasheet pdf - http://www.DataSheet4U.net/
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74LVC161284
AC ELECTRICAL CHARACTERISTICS
Test Condition
Value
Symbol
Parameter
VCC VCCcable
(V) (V)
tPLH Propagation
tPHL Delay Time
A1-A8 to B1-B8,
A9-A13 to Y9-Y13
B1-B8 to A1-A8,
C14-C17 to A14-A17
PLIN to PLOUT
HLIN to HLOUT
tPZH Enable Delay DIR to A
tPZL Time
HD to Bn, Y9-Y13
tPLZ Disable Delay DIR to A
tPHZ Time
DIR to A
HD to Bn, Y9-Y13
tr tf Rise and Fall Time
B1-B8, Y9-Y13 Open Drain
tOSLH Output To Output Skew Time (note1, 2)
tOSHL
3.0
to
3.6
3.0
to
3.6
3.0
to
3.6
3.0
to
3.6
3.0
to
3.6
RL=500Ω CL=50pF
3.0
to RL=500Ω CL=50pF
5.5 RL=500Ω CL=50pF
RL=500Ω CL=50pF
3.0 RL=500Ω CL=50pF
to
5.5 RL=500Ω CL=50pF
3.0 RL=500Ω CL=50pF
to RL=500Ω CL=50pF
5.5 RL=500Ω CL=50pF
3.0
to RL=500Ω CL=50pF
5.5
3.0
to
5.5
RPULL-UP=500Ω
CL=50pF
-40 to 85 °C
Min. Max.
1 7.5
1 9.0
1 7.0
1 11.0
1 12
1 8.5
1 8.5
1 8.5
1 8.5
1 120
12
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device
switching in the same direction, either HIGH or LOW (tOSLH = | tPLHm - tPLHn|, tOSHL = | tPHLm - tPHLn|
2) Parameter guaranteed by design
CAPACITANCE CHARACTERISTICS
Symbol
Parameter
CIN Control Input Capacitance
(HD, DIR, A9-A13, C14-C17,
PLIN, HLIN)
CI/O I/O Pin Capacitance
www.DataSheet.co.kr
Test Condition
VCC
(V)
VCC/CABLE
(V)
Open
3.3
Open
5.0
Value
TA = 25 °C
Min. Typ. Max.
Unit
4 pF
6 pF
5/11
Datasheet pdf - http://www.DataSheet4U.net/
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Part DetailsOn this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for 74LVC161284 electronic component. |
| Information | Total 11 Pages | |
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| Download | [ 74LVC161284.PDF Datasheet ] | |
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