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PDF ISL23425 Data sheet ( Hoja de datos )
| Número de pieza | ISL23425 | |
| Descripción | Low Voltage Digitally Controlled Potentiometer | |
| Fabricantes | Intersil Corporation | |
| Logotipo |  |
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www.DataSheet.co.kr
Dual, 256-Tap, Low Voltage Digitally Controlled
Potentiometer (XDCP™)
ISL23425
The ISL23425 is a volatile, low voltage, low noise, low power,
256-tap, dual digitally controlled potentiometer (DCP) with an
SPI Bus™ interface. It integrates two DCP cores, wiper switches
and control logic on a monolithic CMOS integrated circuit.
Each digitally controlled potentiometer is implemented with a
combination of resistor elements and CMOS switches. The
position of the wipers are controlled by the user through the
SPI bus interface. Each potentiometer has an associated
volatile Wiper Register (WRi, i = 0, 1) that can be directly written
to and read by the user. The contents of the WRi controls the
position of the wiper. When powered on, the wiper of each DCP
will always commence at mid-scale (128 tap position).
The low voltage, low power consumption, and small package
of the ISL23425 make it an ideal choice for use in battery
operated equipment. In addition, the ISL23425 has a VLOGIC
pin allowing down to 1.2V bus operation, independent from the
VCC value. This allows for low logic levels to be connected
directly to the ISL23425 without passing through a voltage
level shifter.
The DCP can be used as a three-terminal potentiometer or as a
two-terminal variable resistor in a wide variety of applications
including control, parameter adjustments, and signal processing.
Applications
• Power supply margining
• Trimming sensor circuits
• Gain adjustment in battery powered instruments
• RF power amplifier bias compensation
Features
• Two potentiometers per package
• 256 resistor taps
• 10kΩ, 50kΩ or 100kΩ total resistance
• SPI serial interface
- No additional level translator for low bus supply
- Daisy Chaining of multiple DCPs
• Maximum supply current without serial bus activity
(standby)
- 4µA @ VCC and VLOGIC = 5V
- 1.7µA @ VCC and VLOGIC = 1.7V
• Shutdown Mode
- Forces the DCP into an end-to-end open circuit and RWi is
connected to RLi internally
- Reduces power consumption by disconnecting the DCP
resistor from the circuit
• Power supply
- VCC = 1.7V to 5.5V analog power supply
- VLOGIC = 1.2V to 5.5V SPI bus/logic power supply
• Wiper resistance: 70Ω typical @ VCC = 3.3V
• Power-on preset to mid-scale (128 tap position)
• Extended industrial temperature range: -40°C to +125°C
• 14 Ld TSSOP or 16 Ld µTQFN packages
• Pb-free (RoHS compliant)
10000
8000
6000
4000
2000
0
0 64 128 192 256
TAP POSITION (DECIMAL)
FIGURE 1. FORWARD AND BACKWARD RESISTANCE vs TAP
POSITION, 10kΩ DCP
VREF
RH1
1 DCP
OF
ISL23325
RW1
RL1
-
+
ISL28114
VREF_M
FIGURE 2. VREF ADJUSTMENT
June 20, 2011
FN7873.0
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas Inc. 2011. All Rights Reserved
Intersil (and design) and XDCP are trademarks owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners
Datasheet pdf - http://www.DataSheet4U.net/
1 page  
www.DataSheet.co.kr
ISL23425
Analog Specifications VCC = 2.7V to 5.5V, VLOGIC = 1.2V to 5.5V over recommended operating conditions unless otherwise stated.
Boldface limits apply over the operating temperature range, -40°C to +125°C. (Continued)
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
(Note 20)
TYP
(Note 8)
MAX
(Note 20)
UNITS
DNL Differential Non-linearity, Guaranteed W option
(Note 12) Monotonic
-1
±0.4
+1 LSB
(Note 9)
U, T option
-0.4
±0.1
+0.4
LSB
(Note 9)
FSerror Full-scale Error
(Note 11)
W option
-5 -2 0 LSB
(Note 9)
U, T option
-2 -0.5 0 LSB
(Note 9)
ZSerror Zero-scale Error
(Note 10)
W option
0 2 5 LSB
(Note 9)
U, T option
0 0.4 2 LSB
(Note 9)
Vmatch DCP to DCP Matching
(Note 22)
DCPs at same tap position, same voltage
at all RH terminals, and same voltage at
all RL terminals
-2
±0.5
2 LSB
(Note 9)
TCV Ratiometric Temperature Coefficient
(Note 14)
W option, Wiper Register set to 80 hex
U option, Wiper Register set to 80 hex
8 ppm/°C
4 ppm/°C
T option, Wiper Register set to 80 hex
2.3 ppm/°C
tLS_Settling Large Signal Wiper Settling Time
From code 0 to FF hex, measured from 0
to 1 LSB settling of the wiper
300
ns
fcutoff -3dB Cutoff Frequency
Wiper at middle point W option
Wiper at middle point U option
1200
250
kHz
kHz
Wiper at middle point T option
120 kHz
RHEOSTAT MODE (Measurements between RW and RL pins with RH not connected, or between RW and RH with RL not connected)
RINL Integral Non-Linearity, Guaranteed
(Note 18) Monotonic
W option; VCC = 2.7V to 5.5V
-2.0
±1
+2.0
MI
(Note 15)
W option; VCC = 1.7V
10.5 MI
(Note 15)
U, T option; VCC = 2.7V to 5.5V
-1.0
±0.3
+1.0
MI
(Note 15)
U, T option; VCC = 1.7V
2.1 MI
(Note 15)
RDNL Differential Non-Linearity, Guaranteed W option; VCC = 2.7V to 5.5V
(Note 17) Monotonic
-1 ±0.4 +1 MI
(Note 15)
W option; VCC = 1.7V
±0.6
MI
(Note 15)
U, T option; VCC = 2.7V to 5.5V
-0.5
±0.15
+0.5
MI
(Note 15)
U, T option; VCC = 1.7V
±0.35
MI
(Note 15)
Roffset Offset, wiper at 0 position
(Note 16)
W option; VCC = 2.7V to 5.5V
0 3 5.5 MI
(Note 15)
W option; VCC = 1.7V
6.3 MI
(Note 15)
U, T option; VCC = 2.7V to 5.5V
0 0.5 2 MI
(Note 15)
U, T option; VCC = 1.7V
1.1 MI
(Note 15)
Rmatch DCP to DCP Matching
(Note 23)
Any two DCPs at the same tap position
with the same terminal voltages
-2
±0.5
2 LSB
(Note 9)
5 FN7873.0
June 20, 2011
Datasheet pdf - http://www.DataSheet4U.net/
5 Page 
www.DataSheet.co.kr
ISL23425
Typical Performance Curves (Continued)
800
250
200
600
150
400
100
200
50
0
15 63 111 159 207
TAP POSITION (DECIMAL)
FIGURE 15. 10kΩ TCr vs TAP POSITION
255
0
15 63 111 159 207
TAP POSITION (DECIMAL)
FIGURE 16. 50kΩ TCr vs TAP POSITION, VCC = 3.3V
255
50
40
30
20
10
0
15 63 111 159 207
TAP POSITION (DECIMAL)
FIGURE 17. 100kΩ TCv vs TAP POSITION, VCC = 3.3V
255
150
120
90
60
30
0
15 63 111 159 207
TAP POSITION (DECIMAL)
FIGURE 18. 100kΩ TCr vs TAP POSITION, VCC = 3.3V
255
SCK CLOCK
RW PIN
CH1: 1V/DIV, 1µs/DIV
CH2: 10mV/DIV, 1µs/DIV
FIGURE 19. WIPER DIGITAL FEED-THROUGH
11
WIPER
CS RISING
CH1: 20mV/DIV, 2µs/DIV
CH2: 2V/DIV, 2µs/DIV
FIGURE 20. WIPER TRANSITION GLITCH
FN7873.0
June 20, 2011
Datasheet pdf - http://www.DataSheet4U.net/
11 Page | ||
| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet ISL23425.PDF ] | |
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