PDF K4H281638L Data sheet ( Hoja de datos )

Número de pieza	K4H281638L
Descripción	128Mb L-die DDR SDRAM Specification
Fabricantes	Samsung semiconductor
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No Preview Available ! K4H281638L DDR SDRAM 128Mb L-die DDR SDRAM Specification 66 TSOP-II with Lead-Free and Halogen-Free (RoHS compliant) INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHER- WISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IN SAMSUNG PRODUCTS OR TECHNOL- OGY. ALL INFORMATION IN THIS DOCUMENT IS PROVIDED ON AS "AS IS" BASIS WITHOUT www.DataGShUeAetR4UA.NcoTmEE OR WARRANTY OF ANY KIND. 1. For updates or additional information about Samsung products, contact your nearest Samsung office. 2. Samsung products are not intended for use in life support, critical care, medical, safety equipment, or similar applications where Product failure could result in loss of life or personal or physical harm, or any military or * Samsung Electronics reserves the right to change products or specification without notice. 1 of 32 Rev. 1.2 Feburary 2009 1 page K4H281638L 4.0 Pin / Ball Description 66pin TSOP - II 8Mb x 16 DDR SDRAM VDD DQ0 VDDQ DQ1 DQ2 VSSQ DQ3 DQ4 VDDQ DQ5 DQ6 VSSQ DQ7 NC VDDQ LDQS NC VDD NC LDM WE CAS RAS CS NC BA0 BA1 AP/A10 A0 A1 A2 A3 VDD 1 66 2 65 3 64 4 63 5 62 6 61 7 60 8 59 9 58 10 66Pin TSOPII 57 11 (400mil x 875mil) 56 12 (0.65mm Pin Pitch) 55 13 54 14 15 Bank Address BA0~BA1 16 53 52 51 17 18 19 Auto Precharge A10 50 49 48 20 47 21 46 22 45 23 44 24 43 25 42 26 41 27 40 28 39 29 38 30 37 31 36 32 35 33 34 128Mb TSOP-II Package Pinout VSS DQ15 VSSQ DQ14 DQ13 VDDQ DQ12 DQ11 VSSQ DQ10 DQ9 VDDQ DQ8 NC VSSQ UDQS NC VREF VSS UDM CK CK CKE NC NC A11 A9 A8 A7 A6 A5 A4 VSS www.DataSheet4U.com Organization 8Mx16 Row Address A0~A11 Column Address A0-A8 DM is internally loaded to match DQ and DQS identically. Row & Column address configuration 5 of 32 Rev. 1.2 Feburary 2009 5 Page K4H281638L DDR SDRAM 7.2 Mode Register Definition Mode Register Set(MRS) The mode register stores the data for controlling the various operating modes of DDR SDRAM. It programs CAS latency, addressing mode, burst length, test mode, DLL reset and various vendor specific options to make DDR SDRAM useful for variety of different appli- cations. The default value of the mode register is not defined, therefore the mode register must be written after EMRS setting for proper DDR SDRAM operation. The mode register is written by asserting low on CS, RAS, CAS, WE and BA0(The DDR SDRAM should be in all bank precharge with CKE already high prior to writing into the mode register). The states of address pins A0 ~ A11 in the same cycle as CS, RAS, CAS, WE and BA0 going low are written in the mode register. Two clock cycles are requested to complete the write opera- tion in the mode register. The mode register contents can be changed using the same command and clock cycle requirements during operation as long as all banks are in the idle state. The mode register is divided into various fields depending on functionality. The burst length uses A0 ~ A2, addressing mode uses A3, CAS latency(read latency from column address) uses A4 ~ A6. A7 is used for test mode. A8 is used for DLL reset. A7 must be set to low for normal MRS operation. Refer to the table for specific codes for various burst lengths, addressing modes and CAS latencies. BA1 BA0 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 RFU 0 RFU DLL TM CAS Latency BT Burst Length Address Bus Mode Register A8 DLL Reset 0 No 1 Yes A7 mode 0 Normal 1 Test A3 Burst Type 0 Sequential 1 Interleave BA0 An ~ A0 0 (Existing)MRS Cycle 1 Extended Funtions(EMRS) * RFU(Reserved for future use) must stay "0" during MRS cycle. CAS Latency A6 A5 00 00 01 01 10 10 11 11 A4 0 1 0 1 0 1 0 1 Latency Reserve Reserve Reserve 3 Reserve Reserve 2.5 Reserve Burst Length A2 A1 A0 000 001 010 011 100 101 110 111 Burst Length Sequential Interleave Reserve Reserve 22 44 88 Reserve Reserve Reserve Reserve Reserve Reserve Reserve Reserve Note : *1 A12 is used for 256Mb only. That is 128Mb uses A0~A11 www.DataSheet4U.com 11 of 32 Rev. 1.2 Feburary 2009 11 Page

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